米6体育平台手机版_好二三四详情

Configuration 1:1 SPST Number of channels 1 Power supply voltage - single (V) 2.5, 3.3, 5 Power supply voltage - dual (V) +/-10, +/-5 Protocols Analog Ron (typ) (Ω) 12 CON (typ) (pF) 14.5 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 250 Bandwidth (MHz) 464 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 11 Negative rail supply voltage (max) (V) -1.65
Configuration 1:1 SPST Number of channels 1 Power supply voltage - single (V) 2.5, 3.3, 5 Power supply voltage - dual (V) +/-10, +/-5 Protocols Analog Ron (typ) (Ω) 12 CON (typ) (pF) 14.5 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 250 Bandwidth (MHz) 464 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 11 Negative rail supply voltage (max) (V) -1.65
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • ±1-V to ±6-V Dual-Supply Operation
  • Specified ON-State Resistance:
    • 25 Max With ±5-V Supply
    • 35 Max With ±3.3-V Supply
    • 47 Max With ±1.8-V Supply
  • Specified Low OFF-Leakage Currents:
    • 5 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 5 nA at 25°C
    • 10 nA at 85°C
  • Low Charge Injection: 13 pC (±5-V Supply)
  • Fast Switching Speed:
    tON = 85 ns, tOFF = 50 ns (±5-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2500-V Human-Body Model (A114-F)
    • 1000-V Charged-Device Model (C101-C)
    • 250-V Machine Model (A115-A)

  • ±1-V to ±6-V Dual-Supply Operation
  • Specified ON-State Resistance:
    • 25 Max With ±5-V Supply
    • 35 Max With ±3.3-V Supply
    • 47 Max With ±1.8-V Supply
  • Specified Low OFF-Leakage Currents:
    • 5 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 5 nA at 25°C
    • 10 nA at 85°C
  • Low Charge Injection: 13 pC (±5-V Supply)
  • Fast Switching Speed:
    tON = 85 ns, tOFF = 50 ns (±5-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2500-V Human-Body Model (A114-F)
    • 1000-V Charged-Device Model (C101-C)
    • 250-V Machine Model (A115-A)

The TS12A4516/TS12A4517 are single pole/single throw (SPST), low-voltage, dual-supply CMOS analog switches, with very low switch ON-state resistance. The TS12A4516 is normally open (NO). The TS12A4517 is normally closed (NC).

These CMOS switches can operate continuously with a dual supplies between ±1 V and ±6 V [(2 V < (V+ – V) < 12 V]. Each switch can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 5 nA at 25°C or 10 nA at 85°C.

For pin-compatible parts for use with single supply, see the TS12A4514/TS12A4515.

The TS12A4516/TS12A4517 are single pole/single throw (SPST), low-voltage, dual-supply CMOS analog switches, with very low switch ON-state resistance. The TS12A4516 is normally open (NO). The TS12A4517 is normally closed (NC).

These CMOS switches can operate continuously with a dual supplies between ±1 V and ±6 V [(2 V < (V+ – V) < 12 V]. Each switch can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 5 nA at 25°C or 10 nA at 85°C.

For pin-compatible parts for use with single supply, see the TS12A4514/TS12A4515.

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* 数据表 Dual-Supply Low ON-State Resistance SPST CMOS Analog Switches 数据表 (Rev. B) 2009年 4月 14日
应用手册 选择正确的米6体育平台手机版_好二三四 (TI) 信号开关 (Rev. E) PDF | HTML 英语版 (Rev.E) PDF | HTML 2022年 8月 5日
应用手册 多路复用器和信号开关词汇表 (Rev. B) 英语版 (Rev.B) PDF | HTML 2022年 3月 11日
应用手册 防止模拟开关的额外功耗 英语版 2008年 7月 15日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

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借助 DIP-Adapter-EVM 加快运算放大器的原型设计和测试,该 EVM 有助于快速轻松地连接小型表面贴装 IC 并且价格低廉。您可以使用随附的 Samtec 端子板连接任何受支持的运算放大器,或者将这些端子板直接连接至现有电路。

DIP-Adapter-EVM 套件支持六种常用的业界通用封装,包括:

  • D 和 U (SOIC-8)
  • PW (TSSOP-8)
  • DGK(MSOP-8、VSSOP-8)
  • DBV(SOT23-6、SOT23-5 和 SOT23-3)
  • DCK(SC70-6 和 SC70-5)
  • DRL (SOT563-6)
用户指南: PDF
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LEADED-ADAPTER1 — 用于快速测试 TI 5、8、10、16 和 24 引脚引线式封装的表面贴装转 DIP 接头适配器

EVM-LEADED1 板可对 TI 的常见引线式封装进行快速测试和电路板试验。该评估板具有足够的空间,可将 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面贴装封装转换为 100mil DIP 接头。     

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仿真模型

TS12A4517 PSpice Model

SCDM170.ZIP (1 KB) - PSpice Model
封装 引脚 CAD 符号、封装和 3D 模型
SOIC (D) 8 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian

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包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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