The ADC32RF42 evaluation module (EVM) demonstrates the performance of a dual 1.5-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF42 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary voltages.
The input for each channel of the ADC is, by default, connected to a transformer input circuit, which can be connected to a 50-Ω single-ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50-Ω single-ended clock source. An onboard LMK04828 can be used to generate the necessary JESD204B clocks. Configuration register access is provided through the onboard USB connection and a Windows®-based GUI. An industry-standard JESD204B pin assignment on an FMC connector allows direct connection to the TSW14J56 Capture Card, as well as many commercially available FPGA development platforms.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | EVM User's guide | ADC32RFxxEVM User's Guide (Rev. E) | 31 Jan 2020 | |
| Certificate | ADC32RF42EVM EU Declaration of Conformity (DoC) | 02 Jan 2019 | ||
| Data sheet | ADC32RF42 Dual-Channel, 14-Bit, 1.5-GSPS, Analog-to-Digital Converter datasheet | PDF | HTML | 16 May 2017 |
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