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LMK5C33216EVM

LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module

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LMK5C33216EVM

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Overview

The LMK5C33216EVM is an evaluation module (EVM) for the LMK5C33216 network clock generator and synchronizer. The EVM can be used for device evaluation, compliance testing, and system prototyping.  The LMK5C33216 integrates three Analog PLLs (APLL) and three Digital PLLs (DPLL) with programmable loop bandwidth. The EVM includes SMA connectors for clock inputs, oscillator inputs, and clock outputs to interface the device with 50-Ω test equipment. The onboard TCXO allows the LMK5C33216 to be evaluated in free-running, locked, or holdover mode of operation. The EVM can be configured through the onboard USB microcontroller (MCU) interface using a PC with TI's TICS Pro software graphical user interface (GUI). TICS Pro can be used to program the LMK5C33216 registers.

Features
  • Three Digital PLL (DPLL) with programmable bandwidths and three fractional analog PLLs (APLLs) for flexible clock generation
  • Two reference inputs to the DPLL supporting hitless switching & holdover
  • 16 output clocks. Outputs driven by BAW are capable of sub 50-fs RMS phase jitter (12 kHz to 20 MHz)
  • Flexible oscillator sources: onboard TCXO, or one of several footprints for other XO, TCXO, OCXO, or external SMA input options
  • On-chip EEPROM for custom start-up clock configurations

3-ft. mini-USB cable (MPN 3021003-03)
Clock network synchronizers
LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO

 

Linear & low-dropout (LDO) regulators
TPS7A88 — 1-A, low-noise, high-PSRR, dual-channel adjustable ultra-low-dropout voltage regulator
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Get started

  1. Order the LMK5C33216EVM
  2. Download and install TICSPRO-SW
  3. Read the LMK5C33216EVM user’s guide
  4. Configure registers on TICSRPRO-SW

Order & start development

Evaluation board

LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module

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TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Supported products & hardware
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TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

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Latest version
Version: 1.7.7.5
Release date: 23 Jul 2024
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TICS Pro 1.7.7.5 installer binary for Windows operating system

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Evaluation board
LMK03806BEVAL — LMK03806B Evaluation Board LMK04208EVM — Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04616EVM — LMK04616 Evaluation Module LMK04805BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04806BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04816BEVAL — Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC LMK04826BEVM — LMK04826BEVM Evaluation Module LMK04828BEVM — LMK04828 evaluation module LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMK04832SEPEVM — LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea LMK04906BEVAL — Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK5B33216EVM — LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2582EVM — LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules LMK04832EVM-CVAL — LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner LMK04368EPEVM — LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner LMK61E0MEVM — LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module LMK61E2EVM — LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support LMX2594EVM — LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module LMX2595EVM — 20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module LMX2615EVM-CVAL — Space grade synthesizer evaluation module LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module LMX2572EVM — 6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support LMX2572LPEVM — 2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module LMX2581EVM — LMX2581 evaluation module LMX2820EVM — LMX2820 22.6-GHz wideband RF synthesizer evaluation module LMX8410LEVM — I/Q demodulator evaluation module LMK5B33414EVM — LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module LMK05028EVM — LMK05028 Network Clock Generator and Synchronizer Evaluation Module LMK05318BEVM — Network synchronizer clock evaluation module CDCI6214EVM — CDCI6214 Ultra-Low Power Clock Generator Evaluation Module CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module LMK3H0102EVM — LMK3H0102 evaluation module

Documentation

open-in-new TICS_Pro_Release_Notes.pdf

TICS Pro 1.7.7.5 Release Notes

open-in-new TICS_Pro_Manifest.htm

TICS Pro 1.7.7.5 Software Manifest

Release Infomation

Added Features

  • LMK5B12212, LMK5C22212A support EEPROM programming

Bug Fixes

  • LMK3H0102 - No longer writes registers on startup.
  • LMK05318B - Export EEPROM Map button bugfix.
  • LMK5B/LMK5C family - Small usability bug-fixes.

Known Issues

  • LMK5C33216
    • When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
  • LMK05318
    • In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
  • Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
  • User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.

What's new

  • Bugfixes and improvements.
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

download LMK5C33216EVM Design Files (Rev. A)
SNAC088A.ZIP (10356 KB)

Technical documentation

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* EVM User's guide LMK5C33216EVM User's Guide (Rev. A) PDF | HTML 15 Feb 2021
Certificate LMK5C33216EVM EU Declaration of Conformity (DoC) 15 Oct 2020

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