The TI TPS1623 VR12.1 reference design, supporting Intel® Pentium™ N3700 , uses TI's driverless PWM architecture with TI power stages for high power density, high efficiency, and low component count while meeting Intel voltage tolerance requirements with low ripple, tight loadline, and high output current monitoring accuracy.
• Meets all Intel® Pentium™ N3700 VCC0+VCC1 rail specifications, including Fast and Slow Dynamic VID transition specs
• Driverless PWM architecture with external TI power stages for high effiency and power density
• 89% Efficiency at 12VIN, 1.2Vout, 1MHz, at 6.4A output current (VCC0+VCC1)
• Load transient performance well within the +/-35mV DC+AC guideline
• Only 30x22uF ceramic output caps
• 8mV pk-pk output voltage ripple at 12VIN, 6A load, PS0 power state
• Meets all Intel® Pentium™ N3700 VCC0+VCC1 rail specifications, including Fast and Slow Dynamic VID transition specs
• Driverless PWM architecture with external TI power stages for high effiency and power density