The aperture delay, t_AD, is the amount of delay, measured from the sampling edge of the clock input, after which signal present at the input pin is sampled inside the device. Data is acquired at the rising edge of CLK+ in non-DES mode and both the falling and rising edges of CLK+ in DES mode. In Non-DES mode, the I and Q channels always sample data on the rising edge of CLK+. In DES mode, that is, DESI, DESQ, DESIQ, and DESCLKIQ, the I-channel samples data on the rising edge of CLK+, and the Q-channel samples data on the falling edge of CLK+. The digital equivalent of that data is available at the digital outputs a constant number of sampling clock cycles later for the DI, DQ, DId and DQd output buses, also known as latency, depending on the demultiplex mode which is selected. In addition to the latency, there is a constant output delay, t_OD, before the data is available at the outputs. See t_OD in the Converter Electrical Characteristics: AC Electrical Characteristics, and also see t_LAT, t_AD, and t_OD in Converter Electrical Characteristics: AC Electrical Characteristics.