The NCOs must be synchronized after setting or changing the value of FREQAx or FREQBx. NCO synchronization is performed when the JESD204C link is initialized or by SYSREF, based on the settings of NCO_SYNC_ILA and NCO_SYNC_NEXT. The procedures are as follows for the JESD204C initialization procedure and the SYSREF procedure for both DC-coupled and AC-coupled SYSREF signals.

NCO synchronization using the JESD204C SYNC signal ( SYNCSE or TMSTP±). Although the 64B/66B encoding modes do not use the SYNC signal to initialize the JESD204C link, it can still be used for NCO synchronization with this method:

1. The device must be programmed for normal operation
2. Set NCO_SYNC_ILA to 1 to enable NCO synchronization using the SYNC signal
3. Set JESD_EN to 0
4. Program FREQAx, FREQBx, PHASEAx, and PHASEBx to the desired settings
5. In the JESD204C receiver (logic device), deassert the SYNC signal by setting SYNC high
6. Set JESD_EN to 1
7. Assert the SYNC signal by setting SYNC low in the JESD204C receiver. This start the code group synchronization (CGS) process in 8B/10B encoding modes or arms the trigger in 64B/66B encoding modes.
8. After achieving CGS (or when ready to synchronize), deassert the SYNC signal by setting SYNC high at the same time for all ADCs to synchronize the NCOs in each ADC. The SYNC signal must meet the required setup and hold times (as specified in the Timing Requirements table)

NCO synchronization using SYSREF (DC-coupled):

1. The device must be programmed for normal operation
2. Set JESD_EN to 1 to start the JESD204C link (the SYNC signal can respond as normal during the CGS process)
3. Program FREQAx, FREQBx, PHASEAx, and PHASEBx to the desired settings
4. Verify that SYSREF is disabled (held low)
5. Arm NCO synchronization by setting NCO_SYNC_NEXT to 1
6. Issue a single SYSREF pulse to all ADCs to synchronize NCOs within all devices

NCO synchronization using SYSREF (AC-coupled):

1. The device must be programmed for normal operation
2. Set JESD_EN to 1 to start the JESD204C link (the SYNC signal can respond as normal during the CGS process)
3. Program FREQAx, FREQBx, PHASEAx, and PHASEBx to the desired settings
4. Run SYSREF continuously
5. Arm NCO synchronization by setting NCO_SYNC_NEXT to 1 at the same time at all ADCs by timing the rising edge of SCLK for the last data bit (LSB) at the end of the SPI write so that the SCLK rising edge occurs after a SYSREF rising edge and early enough before the next SYSREF rising edge so that the trigger is armed before the next SYSREF rising edge (a long SYSREF period is recommended)
6. NCOs in all ADCs are synchronized by the next SYSREF rising edge