Background calibration mode allows the ADC to continuously operate, with no interruption of data. This continuous operation is accomplished by activating an extra ADC core that is calibrated and then takes over operation for one of the other previously active ADC cores. When that ADC core is taken off-line, that ADC is calibrated and can in turn take over to allow the next ADC to be calibrated. This process operates continuously, ensuring the ADC cores always provide the optimum performance regardless of system operating condition changes. Because of the additional active ADC core, background calibration mode has increased power consumption in comparison to foreground calibration mode. The low-power background calibration (LPBG) mode discussed in the Section 7.4.7.3 section provides reduced average power consumption in comparison with the standard background calibration mode. Background calibration can be enabled by setting CAL_BG (see the calibration configuration 0 register). CAL_TRIG_EN must be set to 0 and CAL_SOFT_TRIG must be set to 1.

Great care has been taken to minimize effects on converted data while the core switching process occurs; however, small brief glitches can still occur on the converter data when the cores are swapped.