ZHCS927G May   2012  – January 2018 CDCM6208

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      简化电路原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information, Airflow = 0 LFM
    5. 6.5  Thermal Information, Airflow = 150 LFM
    6. 6.6  Thermal Information, Airflow = 250 LFM
    7. 6.7  Thermal Information, Airflow = 500 LFM
    8. 6.8  Single-Ended Input Characteristics (SI_MODE[1:0], SDI/SDA/PIN1, SCL/PIN4, SDO/ADD0/PIN2, SCS/ADD1/PIN3, STATUS1/PIN0, RESETN/PWR, PDN, SYNCN, REF_SEL)
    9. 6.9  Single-Ended Input Characteristics (PRI_REF, SEC_REF)
    10. 6.10 Differential Input Characteristics (PRI_REF, SEC_REF)
    11. 6.11 Crystal Input Characteristics (SEC_REF)
    12. 6.12 Single-Ended Output Characteristics (STATUS1, STATUS0, SDO, SDA)
    13. 6.13 PLL Characteristics
    14. 6.14 LVCMOS Output Characteristics
    15. 6.15 LVPECL (High-Swing CML) Output Characteristics
    16. 6.16 CML Output Characteristics
    17. 6.17 LVDS (Low-Power CML) Output Characteristics
    18. 6.18 HCSL Output Characteristics
    19. 6.19 Output Skew and Sync to Output Propagation Delay Characteristics
    20. 6.20 Device Individual Block Current Consumption
    21. 6.21 Worst Case Current Consumption
    22. 6.22 Timing Requirements, I2C Timing
    23. 6.23 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Typical Device Jitter
      2. 8.3.2  Universal Input Buffer (PRI_REF, SEC_REF)
      3. 8.3.3  VCO Calibration
      4. 8.3.4  Reference Divider (R)
      5. 8.3.5  Input Divider (M)
      6. 8.3.6  Feedback Divider (N)
      7. 8.3.7  Prescaler Dividers (PS_A, PS_B)
      8. 8.3.8  Phase Frequency Detector (PFD)
      9. 8.3.9  Charge Pump (CP)
      10. 8.3.10 Fractional Output Divider Jitter Performance
      11. 8.3.11 Device Block-Level Description
      12. 8.3.12 Device Configuration Control
      13. 8.3.13 Configuring the RESETN Pin
      14. 8.3.14 Preventing False Output Frequencies in SPI/I2C Mode at Start-Up
      15. 8.3.15 Input MUX and Smart Input MUX
    4. 8.4 Device Functional Modes
      1. 8.4.1 Control Pins Definition
      2. 8.4.2 Loop Filter Recommendations for Pin Modes
      3. 8.4.3 Status Pins Definition
      4. 8.4.4 PLL Lock Detect
      5. 8.4.5 Interface and Control
        1. 8.4.5.1 Register File Reference Convention
        2. 8.4.5.2 SPI - Serial Peripheral Interface
          1. 8.4.5.2.1 Writing to the CDCM6208
          2. 8.4.5.2.2 Reading From the CDCM6208
          3. 8.4.5.2.3 Block Write/Read Operation
          4. 8.4.5.2.4 I2C Serial Interface
    5. 8.5 Programming
    6. 8.6 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1  Jitter Considerations in SERDES Systems
        2. 9.2.2.2  Jitter Considerations in ADC and DAC Systems
        3. 9.2.2.3  Configuring the PLL
        4. 9.2.2.4  Programmable Loop Filter
        5. 9.2.2.5  Loop filter Component Selection
        6. 9.2.2.6  Device Output Signaling
        7. 9.2.2.7  Integer Output Divider (IO)
        8. 9.2.2.8  Fractional Output Divider (FOD)
        9. 9.2.2.9  Output Synchronization
        10. 9.2.2.10 Output Mux on Y4 and Y5
        11. 9.2.2.11 Staggered CLK Output Power Up for Power Sequencing of a DSP
  10. 10Power Supply Recommendations
    1. 10.1 Power Rail Sequencing, Power Supply Ramp Rate, and Mixing Supply Domains
      1. 10.1.1 Mixing Supplies
      2. 10.1.2 Power-On Reset
      3. 10.1.3 Slow Power-Up Supply Ramp
      4. 10.1.4 Fast Power-Up Supply Ramp
      5. 10.1.5 Delaying VDD_Yx_Yy to Protect DSP IOs
    2. 10.2 Device Power-Up Timing
    3. 10.3 Power Down
    4. 10.4 Power Supply Ripple Rejection (PSRR) versus Ripple Frequency
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Reference Schematics
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.4.1 Control Pins Definition

In the absence of a host interface, the CDCM6208 can be powered up in one of 32 pre-configured settings when the pins are SI_MODE[1:0] = 10. The CDCM6208 has 5 control pins identified to achieve commonly used networking frequencies, and change output types. The Smart Input MUX for the PLL is set in most configurations to manual mode in pin mode. Based on the control pins settings for the on-chip PLL, the device generates the appropriate frequencies and appropriate output signaling types at start-up. In the case of the PLL loop filter, "JC" denotes PLL bandwidths of ≤ 1 kHz and "Synth" denotes PLL bandwidths of ≥ 100 kHz.

Table 6. Pre-Configured Settings of CDCM6208V1 Accessible by PlN[4:0](1)(2)

SI_MODE[1:0] pin[4:0] UseCase fin(PRI_REF) Type fin(SEC_REF) Type REF_SEL (note 2) f(PFD) f(VCO) fout(Y0) Type fout(Y1) Type fout(Y2) Type fout(Y3) Type fout(Y4) Type fout(Y5) Type fout(Y6) Type fout(Y7) Type
00 I/O SPI Default 25 LVDS 25 Crystal MANU 25 2500 156.25 CML 156.25 CML 125.00 LVDS 125.00 LVDS 66.66 LVDS 66.66 LVDS 100.00 LVDS 100.00 LVDS
01 I/O I2C Default 25 LVDS 25 Crystal MANU 25 2500 156.25 CML 156.25 CML 125.00 LVDS 125.00 LVDS 66.66 LVDS 66.66 LVDS 100.00 LVDS 100.00 LVDS
11 RESERVED
10 0x00 PinMode 1-V1 25 LVDS 25 Crystal MANU 25 2400 100 LVDS 100 LVDS 100 LVDS 100 LVDS 100 LVDS 100 LVDS 100 LVDS 100 LVDS
10 0x01 PinMode 2-V1 25 LVDS 25 Crystal MANU 25 2400 100 PECL 100 PECL 100 PECL 100 PECL 100 HCSL 100 HCSL 100 HCSL 100 HCSL
10 0x02 PinMode 3-V1 25 LVDS 25 Crystal MANU 25 2400 100 CML 100 CML 100 CML 100 CML 100 LVDS 100 LVDS 100 LVDS 100 LVDS
10 0x03 PinMode 4-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS
10 0x04 PinMode 5-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 PECL 156.25 PECL 156.25 PECL 156.25 PECL 156.25 HCSL 156.25 HCSL 156.25 HCSL 156.25 HCSL
10 0x05 PinMode 6-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 CML 156.25 CML 156.25 CML 156.25 CML 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS
10 0x06 PinMode 7-V1 25 LVDS 25 Crystal MANU 25 2500 125 LVDS 125 LVDS 125 LVDS 125 LVDS 125 LVDS 125 LVDS 125 LVDS 125 LVDS
10 0x07 PinMode 8-V1 25 LVDS 25 Crystal MANU 25 2500 125 PECL 125 PECL 125 PECL 125 PECL 125 HCSL 125 HCSL 125 HCSL 125 HCSL
10 0x08 PinMode 9-V1 25 LVDS 25 Crystal MANU 25 2500 125 CML 125 CML 125 CML 125 CML 125 LVDS 125 LVDS 125 LVDS 125 LVDS
10 0x09 PinMode 10-V1 25 LVDS 25 Crystal MANU 25 2500 125 LVDS 125 LVDS 156.25 LVDS 156.25 LVDS 100 LVDS 100 LVDS 133.33 LVDS 25 LVDS
10 0x0A PinMode 11-V1 25 LVDS 25 Crystal MANU 25 2500 312.5 PECL 312.5 PECL 312.5 PECL 312.5 PECL 312.5 HCSL 312.5 HCSL 312.5 HCSL 312.5 HCSL
10 0x0B PinMode 12-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 PECL 156.25 PECL 100 PECL 100 PECL 156.25 HCSL 156.25 HCSL 100 HCSL 100 HCSL
10 0x0C PinMode 13-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 PECL 156.25 PECL 156.25 PECL 156.25 PECL 125 HCSL 125 HCSL 125 HCSL 125 HCSL
10 0x0D PinMode 14-V1 25 LVDS 25 Crystal MANU 25 2400 200 PECL 200 PECL 100 PECL 100 PECL 100 HCSL 100 HCSL 200 HCSL 200 HCSL
10 0x0E PinMode 15-V1 25 LVDS 25 Crystal MANU 25 2500 500 PECL 500 PECL 250 PECL 250 PECL 125 HCSL 125 HCSL 100 HCSL 25 CMOS
10 0x0F PinMode 16-V1 25 LVDS 25 Crystal MANU 25 2500 625 PECL 625 PECL 312.5 PECL 312.5 PECL 156.25 HCSL 156.25 HCSL 125 HCSL 25 CMOS
10 0x10 PinMode 17-V1 30.72 LVDS 30.72 Crystal MANU 30.72 2457.6 122.88 PECL 122.88 PECL 153.6 PECL 153.6 PECL 30.72 CMOS 153.6 HCSL 61.44 HCSL 122.88 CMOS
10 0x11 PinMode 18-V1 24.8832 LVDS 24.8832 Crystal MANU 24.8832 2488.32 622.08 CML 622.08 CML 622.08 CML 622.08 CML 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x12 PinMode 19-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 LVDS 156.25 LVDS 125 LVDS 125 LVDS 66.67 LVDS 25 CMOS 25 LVDS 100 LVDS
10 0x13 PinMode 20-V1 0.008 CMOS 0.008 CMOS MANU 0.008 2500 156.25 LVDS 156.25 PECL 125 LVDS 125 LVDS 125 CMOS 25 LVDS 100 HCSL 100 HCSL
10 0x14 PinMode 21-V1 25 LVDS 25 Crystal MANU 25 2500 100 LVDS 100 LVDS 156.25 LVDS 156.25 LVDS 122.88 LVDS 30.72 LVDS 66.67 LVDS 153.6 LVDS
10 0x15 PinMode 22-V1 25 LVDS 25 Crystal MANU 25 2500 100 PECL 100 PECL 156.25 PECL 156.25 PECL 100 HCSL 100 HCSL 100 HCSL 100 HCSL
10 0x16 PinMode 23-V1 25 LVDS 25 Crystal MANU 25 2500 100 PECL 100 PECL 156.25 PECL 156.25 PECL 100 HCSL 100 HCSL 156.25 HCSL 100 HCSL
10 0x17 PinMode 24-V1 25 LVDS 25 Crystal MANU 25 2500 125 PECL 125 PECL 100 PECL 100 PECL 100 HCSL 100 HCSL 100 HCSL 100 HCSL
10 0x18 PinMode 25-V1 25 LVDS 25 Crystal MANU 25 2500 100 PECL 100 PECL 156.25 PECL 156.25 PECL 100 HCSL 100 HCSL 155.52 HCSL 155.52 HCSL
10 0x19 PinMode 26-V1 25 LVDS 25 Crystal MANU 25 2500 156.25 PECL 156.25 PECL 100 PECL 100 PECL 125 HCSL 156.26 HCSL 212.5 HCSL 106.25 HCSL
10 0x1A PinMode 27-V1 25 LVDS 25 Crystal MANU 25 2500 100 PECL 100 PECL 250 PECL 250 PECL 100 HCSL 100 HCSL 100 HCSL 125 HCSL
10 0x1B PinMode 28-V1 25 LVDS 25 Crystal MANU 25 2500 100 PECL 100 PECL 250 PECL 250 PECL 100 HCSL 100 HCSL 125 HCSL 66.67 HCSL
10 0x1C PinMode 29-V1 10 CMOS 10 Crystal AUTO 10 2400 25 LVDS 25 LVDS 80 LVDS 80 LVDS 100 LVDS 50 LVDS 66.67 LVDS 44.44 CMOS
10 0x1D PinMode 30-V1 25 CMOS 25 Crystal MANU 25 2500 100 LVDS 100 LVDS 125 LVDS 125 LVDS 33.33 CMOS 66.67 CMOS 50 CMOS 25 CMOS
10 0x1E PinMode 31-V1 30.72 LVDS 30.72 LVDS MANU 30.72 2500 156.25 PECL 156.25 PECL 156.25 PECL 156.25 PECL 100 LVDS 100 LVDS 25 CMOS 25 CMOS
10 0x1F PinMode 32-V1 25 LVDS off off MANU 25 2500 125 CML 125 CML 125 CML 125 CML 100 LVDS 66.67 LVDS 125 LVDS 50 LVDS
Alternative pin mode usage by modifying input frequencies:
10 0x01 PinMode 2-V1 26.5625 LVDS 26.5625 Crystal MANU 26.5625 2550 106.25 PECL 106.25 PECL 106.25 PECL 106.25 PECL 106.25 HCSL 106.25 HCSL 106.25 HCSL 106.25 HCSL
10 0x02 PinMode 3-V1 26.5625 LVDS 26.5625 Crystal MANU 26.5625 2550 106.25 CML 106.25 CML 106.25 CML 106.25 CML 106.25 LVDS 106.25 LVDS 106.25 LVDS 106.25 LVDS
10 0x03 PinMode 4-V1 24 LVDS 24 Crystal MANU 24 2400 150 LVDS 150 LVDS 150 LVDS 150 LVDS 150 LVDS 150 LVDS 150 LVDS 150 LVDS
10 0x03 PinMode 4-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS
10 0x03 PinMode 4-V1 24.8832 LVDS 24.8832 Crystal MANU 24.8832 2488.32 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x04 PinMode 5-V1 24 LVDS 24 Crystal MANU 24 2400 150 PECL 150 PECL 150 PECL 150 PECL 150 HCSL 150 HCSL 150 HCSL 150 HCSL
10 0x04 PinMode 5-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 153.6 PECL 153.6 PECL 153.6 PECL 153.6 PECL 153.6 HCSL 153.6 HCSL 153.6 HCSL 153.6 HCSL
10 0x04 PinMode 5-V1 24.8832 LVDS 24.8832 Crystal MANU 24.8832 2488.32 155.52 PECL 155.52 PECL 155.52 PECL 155.52 PECL 155.52 HCSL 155.52 HCSL 155.52 HCSL 155.52 HCSL
10 0x05 PinMode 6-V1 24 LVDS 24 Crystal MANU 24 2400 150 CML 150 CML 150 CML 150 CML 150 LVDS 150 LVDS 150 LVDS 150 LVDS
10 0x05 PinMode 6-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 153.6 CML 153.6 CML 153.6 CML 153.6 CML 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS
10 0x05 PinMode 6-V1 24.8832 LVDS 24.8832 Crystal MANU 24.8832 2488.32 155.52 CML 155.52 CML 155.52 CML 155.52 CML 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x06 PinMode 7-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS
10 0x07 PinMode 8-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 122.88 PECL 122.88 PECL 122.88 PECL 122.88 PECL 122.88 HCSL 122.88 HCSL 122.88 HCSL 122.88 HCSL
10 0x08 PinMode 9-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 122.88 CML 122.88 CML 122.88 CML 122.88 CML 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS
10 0x0A PinMode 11-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 307.2 PECL 307.2 PECL 307.2 PECL 307.2 PECL 307.2 HCSL 307.2 HCSL 307.2 HCSL 307.2 HCSL
10 0x0C PinMode 13-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 153.6 PECL 153.6 PECL 153.6 PECL 153.6 PECL 122.88 HCSL 122.88 HCSL 122.88 HCSL 122.88 HCSL
10 0x0D PinMode 14-V1 26.5625 LVDS 26.5625 Crystal MANU 26.5625 2550 212.5 PECL 212.5 PECL 106.25 PECL 106.25 PECL 106.25 HCSL 106.25 HCSL 212.5 HCSL 212.5 HCSL
10 0x0E PinMode 15-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 491.52 PECL 491.52 PECL 245.76 PECL 245.76 PECL 122.88 HCSL 122.88 HCSL 98.304 HCSL 24.576 CMOS
10 0x0F PinMode 16-V1 24.576 LVDS 24.576 Crystal MANU 24.576 2457.6 622.08 PECL 622.08 PECL 307.2 PECL 307.2 PECL 153.6 HCSL 153.6 HCSL 122.88 HCSL 24.576 CMOS
10 0x11 PinMode 18-V1 25 LVDS 25 Crystal MANU 25 2500 625 CML 625 CML 625 CML 625 CML 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS
(1) The functionality of the status 0 and status 1 pins in SPI and I2C mode is programmable.
(2) The REF_SEL input pin selects the primary or secondary input in MANUAL mode. That is: If the system only uses a XTAL on the secondary input, REF_SEL should be tied to VDD. The primary and secondary input stage power supply must be always connected.
For all pin modes, STATUS0 outputs the PLL_LOCK signal and STATUS1 the LOSS OF REFERENCE.
General Note: in all pin mode, all voltage supplies must either be 1.8 V or 2.5/3.3 V and the PWR pin number 44 must be set to 0 or 1 accordingly. In SPI and I2C mode, the supply voltages can be "mixed and matched" as long as the corresponding register bits reflect the supply voltage setting for each desired 1.8 V or 2.5/3.3 V supply. Exception: inputs configured for LVDS signaling (Type = LVDS) are supply agnostic, and therefore can be powered from 2.5 V/3.3 V or 1.8 V regardless of the supply select setting of pin number 44.

Table 7. Pre-Configured Settings of CDCM6208V1H Accessible by PIN[4:0](1)(2)

Pre-Configured Settings of CDCM6208 Accessible by PIN[4:0]
CDCM6208 table_10_scas931.gif
CDCM6208 table_10_page2_scas931.gif
(1) The functionality of the status 0 and status 1 pins in SPI and I2C mode is programmable.
(2) The REF_SEL input pin selects the primary or secondary input in MANUAL mode. That is: If the system only uses a XTAL on the secondary input, REF_SEL should be tied to VDD. The primary and secondary input stage power supply must be always connected.
For all pin modes, STATUS0 outputs the PLL_LOCK signal.
General Note: in all pin mode, all voltage supplies must either be 1.8 V or 2.5/3.3 V and the PWR pin number 44 must be set to 0 or 1 accordingly. In SPI and I2C mode, the supply voltages can be mixed and matched as long as the corresponding register bits reflect the supply voltage setting for each desired 1.8 V or 2.5/3.3 V supply. Exception: inputs configured for LVDS signaling (Type = LVDS) are supply agnostic, and therefore can be powered from 2.5 V/3.3 V or 1.8 V regardless of the supply select setting of pin number 44.

Table 8. Pre-Configured Settings of CDCM6208V2 Accessible by PIN[4:0](1)(2)

SI_MODE[1:0] pin[4:0] UseCase fin(PRI_REF) Type fin(SEC_REF) Type REF_SEL (note 2) f(PFD) f(VCO) fout(Y0) Type fout(Y1) Type fout(Y2) Type fout(Y3) Type fout(Y4) Type fout(Y5) Type fout(Y6) Type fout(Y7) Type
00 I/O SPI Default 30.72 LVDS 30.72 Crystal MANU 30.72 3072 153.60 LVDS 153.60 LVDS 122.88 LVDS 122.88 LVDS 61.44 LVDS 61.44 LVDS 30.72 LVDS 30.72 LVDS
01 I/O I2C Default 30.72 LVDS 30.72 Crystal MANU 30.72 3072 153.60 LVDS 153.60 LVDS 122.88 LVDS 122.88 LVDS 61.44 LVDS 61.44 LVDS 30.72 LVDS 30.72 LVDS
11 RESERVED
10 0x00 PinMode 1-V2 19.44 LVDS 19.44 Crystal MANU 19.44 3110.4 155.52 PECL 155.52 PECL 155.52 PECL 155.52 PECL 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x01 PinMode 2-V2 19.44 LVDS 19.44 Crystal MANU 19.44 3110.4 155.52 PECL 155.52 PECL 155.52 PECL 155.52 PECL 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x02 PinMode 3-V2 19.44 LVDS 19.44 Crystal MANU 19.44 3110.4 155.52 PECL 155.52 PECL 155.52 PECL 155.52 PECL 155.52 HCSL 155.52 HCSL 155.52 HCSL 155.52 HCSL
10 0x03 PinMode 4-V2 19.44 LVDS 19.44 Crystal MANU 19.44 3110.4 622.08 PECL 622.08 PECL 622.08 PECL 622.08 PECL 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS
10 0x04 PinMode 5-V2 25 LVDS 25 Crystal MANU 25 3000 125 PECL 125 PECL 125 PECL 125 PECL 100 HCSL 100 HCSL 100 HCSL 100 HCSL
10 0x05 PinMode 6-V2 25 LVDS 25 Crystal MANU 25 3000 125 LVDS 125 LVDS 125 LVDS 125 LVDS 100 LVDS 100 LVDS 100 LVDS 100 LVDS
10 0x06 PinMode 7-V2 25 LVDS 25 Crystal MANU 25 3000 250 LVDS 250 LVDS 250 LVDS 250 LVDS 250 LVDS 250 LVDS 250 LVDS 250 LVDS
10 0x07 PinMode 8-V2 25 LVDS 25 Crystal MANU 25 3000 200 PECL 200 PECL 200 PECL 200 PECL 200 HCSL 200 HCSL 200 HCSL 200 HCSL
10 0x08 PinMode 9-V2 25 LVDS 25 Crystal MANU 25 3000 187.5 PECL 187.5 PECL 187.5 PECL 187.5 PECL 187.5 HCSL 187.5 HCSL 187.5 HCSL 187.5 HCSL
10 0x09 PinMode 10-V2 38.4 LVDS 38.4 Crystal MANU 38.4 3072 153.6 LVDS 153.6 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 153.6 LVDS 153.6 LVDS
10 0x0A PinMode 11-V2 38.4 LVDS 38.4 Crystal MANU 9.6 3072 153.6 LVDS 153.6 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 153.6 LVDS 153.6 LVDS
10 0x0B PinMode 12-V2 25 LVDS 25 Crystal MANU 25 3000 100 LVDS x x x x x x 100 HCSL 25 CMOS 24 CMOS 27 CMOS
10 0x0C PinMode 13-V2 122.88 LVDS 122.88 LVDS MANU 3.072 3072 153.6 LVDS 153.6 LVDS 122.88 LVDS 122.88 LVDS 30.72 LVDS 30.72 LVDS 61.44 LVDS 61.44 LVDS
10 0x0D PinMode 14-V2 153.6 LVDS 153.6 LVDS MANU 0.384 3072 153.6 LVDS 153.6 LVDS 122.88 LVDS 122.88 LVDS 30.72 LVDS 30.72 LVDS 61.44 LVDS 61.44 LVDS
10 0x0E PinMode 15-V2 30.72 LVDS 30.72 Crystal MANU 30.72 2949.12 491.52 PECL 491.52 PECL 245.76 PECL 245.76 PECL 122.88 LVDS 122.88 LVDS 61.44 LVDS 30.72 LVDS
10 0x0F PinMode 16-V2 19.44 LVDS 19.44 Crystal MANU 19.44 3110.4 155.52 LVDS 155.52 LVDS 155.52 LVDS 155.52 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS
10 0x10 PinMode 17-V2 30.72 LVDS 30.72 Crystal MANU 30.72 2949.12 245.76 LVDS 245.76 LVDS 245.76 LVDS 245.76 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS 122.88 LVDS
10 0x11 PinMode 18-V2 25 LVDS 25 Crystal MANU 6.25 3125 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS 106.25 LVDS 106.25 LVDS 106.25 LVDS 106.25 LVDS
10 0x12 PinMode 19-V2 25 LVDS 25 Crystal MANU 25 3000 125 LVDS 125 LVDS 125 LVDS 125 LVDS 106.25 LVDS 106.25 LVDS 106.25 LVDS 106.25 LVDS
10 0x13 PinMode 20-V2 25 LVDS 25 Crystal MANU 25 3125 156.25 PECL 156.25 PECL 125 PECL 125 PECL 66.67 CMOS 33.33 CMOS 50 CMOS 12.5 CMOS
10 0x14 PinMode 21-V2 25 CMOS 25 Crystal MANU 25 3125 125 LVDS 125 LVDS 125 LVDS 125 LVDS 66.67 LVDS 156.25 LVDS 125 LVDS 100 LVDS
10 0x15 PinMode 22-V2 25 LVDS 25 Crystal MANU 1 3072 153.6 LVDS 153.6 LVDS 122.88 LVDS 122.88 LVDS 66.67 LVDS 156.25 LVDS 30.72 LVDS 100 LVDS
10 0x16 PinMode 23-V2 19.2 LVDS 19.2 Crystal MANU 3.84 2949.12 122.88 LVDS 122.88 PECL 122.88 LVDS 122.88 LVDS 30.72 LVDS 66.67 LVDS 153.6 LVDS 250 LVDS
10 0x17 PinMode 24-V2 30.72 LVDS 30.72 Crystal MANU 30.72 2949.12 122.88 LVDS 122.88 LVDS 30.72 LVDS 30.72 LVDS 66.67 LVDS 100 LVDS 156.25 LVDS 156.25 LVDS
10 0x18 PinMode 25-V2 25 LVDS 25 Crystal MANU 25 3000 125 LVDS 125 LVDS 125 LVDS 125 LVDS 68.75 LVDS 68.75 LVDS 68.75 LVDS 68.75 LVDS
10 0x19 PinMode 26-V2 10 LVDS 10 Crystal MANU 0.08 2949.12 245.76 PECL 245.76 PECL 122.88 PECL 122.88 PECL 125 LVDS 100 LVDS 307.2 LVDS 307.2 LVDS
10 0x1A PinMode 27-V2 30.72 LVDS 30.72 LVDS MANU 30.72 2949.12 122.88 LVDS x x 30.72 LVDS 30.72 LVDS 156.25 LVDS 156.25 LVDS 100 LVDS 66.67 LVDS
10 0x1B PinMode 28-V2 10 CMOS 10 LVDS MANU 0.08 2949.12 245.76 CML 245.76 CML 122.88 CML 122.88 CML 30.72 LVDS 66.67 LVDS 156.25 LVDS 307.2 LVDS
10 0x1C PinMode 29-V2 19.44 LVDS 19.44 Crystal MANU 0.01 3125 156.25 LVDS 156.25 LVDS 125 LVDS 125 LVDS 66.67 LVDS 100 LVDS 25 LVDS 25 LVDS
10 0x1D PinMode 30-V2 30.72 LVDS 30.72 Crystal MANU 30.72 2949.12 737.28 PECL 737.28 PECL 491.52 PECL 491.52 PECL 122.88 HCSL 122.88 HCSL 122.88 LVDS 122.88 LVDS
10 0x1E PinMode 31-V2 30.72 LVDS 30.72 Crystal MANU 30.72 3072 614.4 PECL 614.4 PECL 307.2 PECL 307.2 PECL 153.6 HCSL 153.6 HCSL 153.6 LVDS 153.6 LVDS
10 0x1F PinMode 32-V2 30.72 LVDS 30.72 Crystal MANU 30.72 3072 153.6 CML 153.6 CML 153.6 CML 153.6 CML 100 LVDS 66.67 LVDS 125 LVDS 50 LVDS
Alternative PinMode usage by modifying input frequencies:
10 0x00 PinMode 1-V2 19.2 LVDS 19.2 Crystal MANU 19.2 3072 153.6 PECL 153.6 PECL 153.6 PECL 153.6 PECL 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS
10 0x01 PinMode 2-V2 19.2 LVDS 19.2 Crystal MANU 19.2 3072 153.6 PECL 153.6 PECL 153.6 PECL 153.6 PECL 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS
10 0x03 PinMode 4-V2 19.2 LVDS 19.2 Crystal MANU 19.2 3072 614.4 PECL 614.4 PECL 614.4 PECL 614.4 PECL 153.6 LVDS 153.6 LVDS 153.6 LVDS 153.6 LVDS
10 0x11 PinMode 18-V1 25 LVDS 25 Crystal MANU 25 2500 625 CML 625 CML 625 CML 625 CML 156.25 LVDS 156.25 LVDS 156.25 LVDS 156.25 LVDS
(1) The functionality of the status 0 and status 1 pins in SPI and I2C mode is programmable.
(2) The REF_SEL input pin selects the primary or secondary input in MANUAL mode. That is: If the system only uses a XTAL on the secondary input, REF_SEL should be tied to VDD. The primary and secondary input stage power supply must be always connected.
For all pin modes, STATUS0 outputs the PLL_LOCK signal and STATUS1 the LOSS OF REFERENCE.
General Note: in all pin mode, all voltage supplies must either be 1.8 V or 2.5/3.3 V and the PWR pin number 44 must be set to 0 or 1 accordingly. In SPI and I2C mode, the supply voltages can be mixed and matched as long as the corresponding register bits reflect the supply voltage setting for each desired 1.8-V or 2.5/3.3-V supply.
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