ZHCS927G May   2012  – January 2018 CDCM6208

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      简化电路原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information, Airflow = 0 LFM
    5. 6.5  Thermal Information, Airflow = 150 LFM
    6. 6.6  Thermal Information, Airflow = 250 LFM
    7. 6.7  Thermal Information, Airflow = 500 LFM
    8. 6.8  Single-Ended Input Characteristics (SI_MODE[1:0], SDI/SDA/PIN1, SCL/PIN4, SDO/ADD0/PIN2, SCS/ADD1/PIN3, STATUS1/PIN0, RESETN/PWR, PDN, SYNCN, REF_SEL)
    9. 6.9  Single-Ended Input Characteristics (PRI_REF, SEC_REF)
    10. 6.10 Differential Input Characteristics (PRI_REF, SEC_REF)
    11. 6.11 Crystal Input Characteristics (SEC_REF)
    12. 6.12 Single-Ended Output Characteristics (STATUS1, STATUS0, SDO, SDA)
    13. 6.13 PLL Characteristics
    14. 6.14 LVCMOS Output Characteristics
    15. 6.15 LVPECL (High-Swing CML) Output Characteristics
    16. 6.16 CML Output Characteristics
    17. 6.17 LVDS (Low-Power CML) Output Characteristics
    18. 6.18 HCSL Output Characteristics
    19. 6.19 Output Skew and Sync to Output Propagation Delay Characteristics
    20. 6.20 Device Individual Block Current Consumption
    21. 6.21 Worst Case Current Consumption
    22. 6.22 Timing Requirements, I2C Timing
    23. 6.23 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Typical Device Jitter
      2. 8.3.2  Universal Input Buffer (PRI_REF, SEC_REF)
      3. 8.3.3  VCO Calibration
      4. 8.3.4  Reference Divider (R)
      5. 8.3.5  Input Divider (M)
      6. 8.3.6  Feedback Divider (N)
      7. 8.3.7  Prescaler Dividers (PS_A, PS_B)
      8. 8.3.8  Phase Frequency Detector (PFD)
      9. 8.3.9  Charge Pump (CP)
      10. 8.3.10 Fractional Output Divider Jitter Performance
      11. 8.3.11 Device Block-Level Description
      12. 8.3.12 Device Configuration Control
      13. 8.3.13 Configuring the RESETN Pin
      14. 8.3.14 Preventing False Output Frequencies in SPI/I2C Mode at Start-Up
      15. 8.3.15 Input MUX and Smart Input MUX
    4. 8.4 Device Functional Modes
      1. 8.4.1 Control Pins Definition
      2. 8.4.2 Loop Filter Recommendations for Pin Modes
      3. 8.4.3 Status Pins Definition
      4. 8.4.4 PLL Lock Detect
      5. 8.4.5 Interface and Control
        1. 8.4.5.1 Register File Reference Convention
        2. 8.4.5.2 SPI - Serial Peripheral Interface
          1. 8.4.5.2.1 Writing to the CDCM6208
          2. 8.4.5.2.2 Reading From the CDCM6208
          3. 8.4.5.2.3 Block Write/Read Operation
          4. 8.4.5.2.4 I2C Serial Interface
    5. 8.5 Programming
    6. 8.6 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1  Jitter Considerations in SERDES Systems
        2. 9.2.2.2  Jitter Considerations in ADC and DAC Systems
        3. 9.2.2.3  Configuring the PLL
        4. 9.2.2.4  Programmable Loop Filter
        5. 9.2.2.5  Loop filter Component Selection
        6. 9.2.2.6  Device Output Signaling
        7. 9.2.2.7  Integer Output Divider (IO)
        8. 9.2.2.8  Fractional Output Divider (FOD)
        9. 9.2.2.9  Output Synchronization
        10. 9.2.2.10 Output Mux on Y4 and Y5
        11. 9.2.2.11 Staggered CLK Output Power Up for Power Sequencing of a DSP
  10. 10Power Supply Recommendations
    1. 10.1 Power Rail Sequencing, Power Supply Ramp Rate, and Mixing Supply Domains
      1. 10.1.1 Mixing Supplies
      2. 10.1.2 Power-On Reset
      3. 10.1.3 Slow Power-Up Supply Ramp
      4. 10.1.4 Fast Power-Up Supply Ramp
      5. 10.1.5 Delaying VDD_Yx_Yy to Protect DSP IOs
    2. 10.2 Device Power-Up Timing
    3. 10.3 Power Down
    4. 10.4 Power Supply Ripple Rejection (PSRR) versus Ripple Frequency
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Reference Schematics
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.4.2 Loop Filter Recommendations for Pin Modes

The following two tables provide the internal charge pump and R3/C3 settings for pin modes. The designer can either design their own optimized loop filter, or use the suggested loop filter in the Table 10.

Table 9. CDCM6208V1 Loop Filter Recommendation for Pin Mode

SI_MODE [1:0] PIN[4:0] USECASE f(PFD)
[MHz]		 ICP
[mA]		 SUGGESTED LOOP FILTER
C1/R2/C2		 INTERNAL LPF COMPONENTS
R3 C3
00 out SPI Default 25 2.5 100pF/500R/22nF 100 Ω 242.5 pF
10 0x00 Pin Mode 1 - V1 25 2.5 100 Ω 242.5 pF
10 0x01 Pin Mode 2 - V1 25 2.5 100 Ω 242.5 pF
10 0x02 Pin Mode 3 - V1 25 2.5 100 Ω 242.5 pF
10 0x03 Pin Mode 4 - V1 25 2.5 100 Ω 242.5 pF
10 0x04 Pin Mode 5 - V1 25 2.5 100 Ω 242.5 pF
10 0x05 Pin Mode 6 - V1 25 2.5 100 Ω 242.5 pF
10 0x06 Pin Mode 7 - V1 25 2.5 100 Ω 242.5 pF
10 0x07 Pin Mode 8 - V1 25 2.5 100 Ω 242.5 pF
10 0x08 Pin Mode 9 - V1 25 2.5 100 Ω 242.5 pF
10 0x09 Pin Mode 10 - V1 25 2.5 100 Ω 242.5 pF
10 0x0A Pin Mode 11 - V1 25 2.5 100 Ω 242.5 pF
10 0x0B Pin Mode 12 - V1 25 2.5 100 Ω 242.5 pF
10 0x0C Pin Mode 13 - V1 25 2.5 100 Ω 242.5 pF
10 0x0D Pin Mode 14 - V1 25 2.5 100 Ω 242.5 pF
10 0x0E Pin Mode 15 - V1 25 2.5 100 Ω 242.5 pF
10 0x0F Pin Mode 16 - V1 25 2.5 100 Ω 242.5 pF
10 0x10 Pin Mode 17 - V1 30.72 2.5 220pF/400/22nF 100 Ω 242.5 pF
10 0x11 Pin Mode 18 - V1 24.8832 2.5 100pF/500R/22nF 100 Ω 242.5 pF
10 0x12 Pin Mode 19 - V1 25 2.5 100 Ω 242.5 pF
10 0x13 Pin Mode 20 - V1 0.008 0.5 1uF/1.3k/22uF 4010 Ω 562.5 pF
10 0x14 Pin Mode 21 - V1 25 2.5 100pF/500R/22nF 100 Ω 242.5 pF
10 0x15 Pin Mode 22 - V1 25 2.5 100 Ω 242.5 pF
10 0x16 Pin Mode 23 - V1 25 2.5 100 Ω 242.5 pF
10 0x17 Pin Mode 24 - V1 25 2.5 100 Ω 242.5 pF
10 0x18 Pin Mode 25 - V1 25 2.5 100 Ω 242.5 pF
10 0x19 Pin Mode 26 - V1 25 2.5 100 Ω 242.5 pF
10 0x1A Pin Mode 27 - V1 25 2.5 10 Ω 30.0 pF
10 0x1B Pin Mode 28 - V1 25 2.5 100 Ω 242.5 pF
10 0x1C Pin Mode 29 - V1 10 2.5 20pF/1210/68nF 100 Ω 242.5 pF
10 0x1D Pin Mode 30 - V1 25 2.5 100pF/500R/22nF 100 Ω 242.5 pF
10 0x1E Pin Mode 31 - V1 0.04 0.5 4.7uF/250/47uF 4010 Ω 562.5 pF
10 0x1F Pin Mode 32 - V1 25 2.5 100pF/500R/22nF 100 Ω 242.5 pF

Table 10. CDCM6208V1H Loop Filter Recommendation for Pin Mode

Table 11. CDCM6208V2 Loop Filter Recommendation for Pin Mode

SI_MODE [1:0] PIN[4:0] USECASE f(PFD)
[MHz]		 ICP
[mA]		 SUGGESTED LOOP FILTER
C1/R2/C2		 INTERNAL LPF COMPONENTS
R3 C3
00 out SPI Default 30.72 2.5 470pF/560R/100nF 100 Ω 242.5 pF
10 0x00 Pin Mode 1 - V1 19.44 2.5 330pF/530R/22nF 100 Ω 242.5 pF
10 0x01 Pin Mode 2 - V1 19.44 0.5 4.7uF/10R/100uF 4010 Ω 562.5 pF
10 0x02 Pin Mode 3 - V1 19.44 2.5 330pF/530R/22nF 100 Ω 242.5 pF
10 0x03 Pin Mode 4 - V1 19.44 2.5 100 Ω 242.5 pF
10 0x04 Pin Mode 5 - V1 25 2.5 200pF/400R/22nF 100 Ω 242.5 pF
10 0x05 Pin Mode 6 - V1 25 2.5 100 Ω 242.5 pF
10 0x06 Pin Mode 7 - V1 25 2.5 100 Ω 242.5 pF
10 0x07 Pin Mode 8 - V1 25 2.5 100 Ω 242.5 pF
10 0x08 Pin Mode 9 - V1 25 2.5 100 Ω 242.5 pF
10 0x09 Pin Mode 10 - V1 38.4 2.5 220p/280R/22n 100 Ω 242.5 pF
10 0x0A Pin Mode 11 - V1 9.6 0.5 4.7uF/10R/100uF 4010 Ω 562.5 pF
10 0x0B Pin Mode 12 - V1 25 2.5 200pF/400R/22nF 100 Ω 242.5 pF
10 0x0C Pin Mode 13 - V1 3.072 0.5 10uF/15R/100uF 4010 Ω 562.5 pF
10 0x0D Pin Mode 14 - V1 0.384 0.5 10uF/42R/100uF 4010 Ω 562.5 pF
10 0x0E Pin Mode 15 - V1 30.72 2.5 470pF/560R/100nF 100 Ω 242.5 pF
10 0x0F Pin Mode 16 - V1 19.44 2.5 330pF/530R/22nF 100 Ω 242.5 pF
10 0x10 Pin Mode 17 - V1 30.72 2.5 470pF/560R/100nF 100 Ω 242.5 pF
10 0x11 Pin Mode 18 - V1 6.25 2.5 100p/1.1k/10n 530 Ω 310.0 pF
10 0x12 Pin Mode 19 - V1 25 2.5 200pF/400R/22nF 100 Ω 242.5 pF
10 0x13 Pin Mode 20 - V1 25 2.5 100 Ω 242.5 pF
10 0x14 Pin Mode 21 - V1 25 2.5 100 Ω 242.5 pF
10 0x15 Pin Mode 22 - V1 1 2.5 100p/1.5k/100n 4010 Ω 562.5 pF
10 0x16 Pin Mode 23 - V1 3.84 1.5 22nF/220R/1uF 1050 Ω 562.5 pF
10 0x17 Pin Mode 24 - V1 30.72 2.5 470pF/560R/100nF 100 Ω 242.5 pF
10 0x18 Pin Mode 25 - V1 25 2.5 200pF/400R/22nF 100 Ω 242.5 pF
10 0x19 Pin Mode 26 - V1 0.08 1 5uF/100/100uF 4010 Ω 562.5 pF
10 0x1A Pin Mode 27 - V1 30.72 2.5 470pF/560R/100nF 10 Ω 242.5 pF
10 0x1B Pin Mode 28 - V1 0.08 1 5uF/100/100uF 4010 Ω 562.5 pF
10 0x1C Pin Mode 29 - V1 0.01 1.5 5uF/200/100uF 4010 Ω 562.5 pF
10 0x1D Pin Mode 30 - V1 30.72 2.5 470pF/560R/100nF 100 Ω 242.5 pF
10 0x1E Pin Mode 31 - V1 30.72 2.5 100 Ω 242.5 pF
10 0x1F Pin Mode 32 - V1 30.72 2.5 100 Ω 242.5 pF
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