ZHCSGM6C February 2017 – April 2020 DAC38RF82 , DAC38RF89
PRODUCTION DATA.
All receive channels include a 12-bit counter for accumulating pattern verification errors. This counter is accessible via the ECOUNT IEEE1500 Char field. It is an essential part of the eye scan capability (see the Eye Scan section).
The counter increments once for every cycle that the TESTFAIL bit is detected. The counter does not increment when at its maximum value (i.e., all 1s). When an IEEE1500 capture is performed, the count value is loaded into the ECOUNT scan elements (so that it can be scanned out), and the counter is then reset, provided NCOR is set high.
ECOUNT can be used to get a measure of the bit error rate. However, as the error rate increases, it becomes less accurate due to limitations of the pattern verification capabilities. Specifically, the pattern verifier checks multiple bits in parallel (as determined by the Rx bus width), and it is not possible to distinguish between 1 or more errors.