For OUT7 in low-RDSON mode, there is a fixed frequency current regulation feature called HS ITRIP that can be used to restart the driver if over current occurs. This ITRIP feature (separate from ITRIP for half-bridges) is available for OUT7 (and EC driver) of the high-side drivers, and intended for loads which have inrush currents that are higher than the over current protection threshold of a driver, such as a lamp or bulb.

It is important to note that in order for HS ITRIP to work, OUT7 OCP must be disabled.

If bit OUT7_ITRIP_CNFG bits are non-zero, and the load current on OUT7 exceeds I_OC7 threshold, ITRIP regulation takes place. The status bit is OUT7_ITRIP_STAT in register EC_HEAT_ITRIP_STAT is asserted depending on OUT7_ITRIP_CNFG configuration.

There is also an optional OUT7 ITRIP timeout feature. Depending on OUT7_ITRIP_CNFG settings, OUT7 or ITRIP regulation can be disabled after timeout is exceeded. For OUT7_ITRIP_CNFG = 01b, OUT7 is disabled if ITRIP regulation time t_{OUT7_ITRIP} occurs for longer than the configured timeout t_{OUT7_ITRIP_TO}. For OUT7_ITRIP_CNFG = 11b, ITRIP Regulation is disabled if ITRIP regulation time t_{OUT7_ITRIP} occurs for longer than the configured timeout t_{OUT7_ITRIP_TO}. In both cases, the status bit OUT7_ITRIP_TO is latched. Bits OUT7_ITRIP_CNFG is located in register HS_REG_CNFG1. If it is desirable to have OUT7 ITRIP regulation occur indefinitely, set OUT7_ITRIP_CNFG = 10b.

The table below summarizes the regulation, status and fault behavior of OUT7 ITRIP.

The table below summarizes time limit options:

HS ITRIP mode is disabled as the default setting for OUT7. To set OUT7 in HS ITRIP mode:

1. Configure OUT7 for low-RDSON mode by setting bit OUT7_RDSON_MODE = 1 in register HS_OC_CNFG.
2. Enable and configure OUT7 ITRIP by setting bits OUT7_ITRIP_CNFG = 1Xb in register HS_REG_CNFG1 per the OUT7 ITRIP configuration summary table.
3. If timeout is used, configure timeout limit with ITRIP_TO_SEL bits in HS_REG_CNFG1.
4. Set ITRIP timing parameters. ITRIP frequency, blanking and deglitch configured with bits OUT7_ITRIP_FREQ, OUT7_ITRIP_BLK and OUT7_ITRIP_DG in register HS_REG_CNFG1.
5. Disable OCP for OUT7 with bit OUT7_OCP_DIS in register HS_REG_CNFG1.

The ITRIP deglitch timer starts when the OUT7 ITRIP blank time expires. The minimum OUT7 ITRIP ON time is the sum of blanking and deglitch times, and total period is determined by the OUT7 ITRIP frequency. The diagram below shows the ITRIP behavior for OUT7.

Figure 7-5 OUT7 ITRIP Behavior with Incandescent Bulb

The recovery activation sequence for OUT7 in HS ITRIP mode has three configurable timing parameters:

• t_{OUT7_ITRIP_FREQ} (1/T_{OUT7_ITRIP_FREQ})
• t_{OUT7_ITRIP_BLK}
• t_{OUT7_ITRIP_DG}

The blanking time t_{OUT7_ITRIP_BLK} is default 40 μs (typ), after which the over current condition can be detected. t_{OUT7_ITRIP_DG} is the time OUT7 remains on after over current protection threshold is exceeded. T_{OUT7_ITRIP_FREQ} is the time period of the ITRIP loop, inverse of t_{OUT7_ITRIP_FREQ}. These settings are configurable in register HS_REG_CNFG1.