Proper power supply decoupling is important to ensure a stable power supply with minimal power supply noise. Bypassing capacitors are needed to reduce the impact of switching noise which could limit performance. For a conservative approach, three parallel-connected decoupling capacitors (multi-layered ceramic type in surface mount form factor) between each V_CC (V_CC, PLL V_CC, LVDS V_CC) and the ground plane(s) are recommended. The three capacitor values are 0.1 μF, 0.01 μF, and 0.001 μF. The preferred capacitor size is 0402. An example is shown in Figure 28. The designer should employ wide traces for power and ground and ensure each capacitor has its own via to the ground plane. This helps to reduce overall inductance with regards to power supply filtering. If board space is limiting the number of bypass capacitors, the PLL V_CC should receive the most filtering. Next would be the LVDS V_CC pins and finally the logic V_CC pins.

Figure 28. Recommended Bypass Capacitor Decoupling
Configuration for V_CC, PLL V_CC, and LVDS V_CC