米6体育平台手机版

ZHCSMR3A november 2020 – november 2020 DS90UB633A-Q1

PRODUCTION DATA

封装选项

6.5 Electrical Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
LVCMOS DC SPECIFICATIONS 3.3 V I/O (SER INPUTS, GPIO, CONTROL INPUTS AND OUTPUTS)
V_IH	High level input voltage	V_IN = 3 V to 3.6 V		2		V_IN	V
V_IL	Low level input voltage	V_IN = 3 V to 3.6 V		GND		0.8	V
I_IN	Input current	V_IN = 0 V or 3.6 V, V_IN = 3 V to 3.6 V		–20	±1	20	µA
V_OH	High level output voltage	V_(VDDIO) = 3 V to 3.6 V, I_OH = −4 mA		2.4		V_(VDDIO)	V
V_OL	Low level output voltage	V_(VDDIO) = 3 V to 3.6 V, I_OL = 4 mA		GND		0.4	V
I_OS	Output short-circuit current	V_OUT = 0 V	Serializer GPO outputs		–15		mA
I_OZ	Tri-state output current	PDB = 0 V, V_OUT = 0 V or V_(VDDIO)	Serializer GPO outputs	–20		20	µA
C_GPO	Pin capacitance	GPO [3:0]			1.5		pF
LVCMOS DC SPECIFICATIONS 1.8 V I/O (SER INPUTS, GPIO, CONTROL INPUTS AND OUTPUTS)
V_IH	High level input voltage	V_IN = 1.71 V to 1.89 V		0.65 V_IN		V_IN	V
V_IL	Low level input voltage	V_IN = 1.71 V to 1.89 V		GND		0.35 V_IN	V
I_IN	Input current	V_IN = 0 V or 1.89 V, V_IN = 1.71 V to 1.89 V		–20	±1	20	µA
V_OH	High level output voltage	V_(VDDIO) = 1.71 V to 1.89 V, I_OH = −4 mA		V_(VDDIO) – 0.45		V_(VDDIO)	V
V_OL	Low level output voltage	V_(VDDIO) = 1.71 V to 1.89 V I_OL = 4 mA		GND		0.45	V
I_OS	Output short-circuit current	V_OUT = 0 V	Serializer GPO outputs		–11		mA
I_OZ	Tri-state output current	PDB = 0 V, V_OUT = 0 V or V_(VDDIO)	Serializer GPO outputs	–20		20	µA
C_GPO	Pin capacitance	GPO [3:0]			1.5		pF
I_{IN_STRAP}	Strap pin input current	V_IN = 0 V to V_{DD_n}	MODE, IDX	–1		1	µA
LVCMOS DC SPECIFICATIONS 2.8 V I/O (SER INPUTS, GPIO, CONTROL INPUTS AND OUTPUTS)
V_IH	High level input voltage	V_IN = 2.52 V to 3.08 V		0.7 V_IN		V_IN	V
V_IL	Low level input voltage	V_IN = 2.52 V to 3.08 V		GND		0.3 V_IN	V
I_IN	Input current	V_IN = 0 V or 3.08 V, V_IN = 2.52 V to 3.08 V		–20	±1	20	µA
V_OH	High level output voltage	V_(VDDIO) = 2.52 V to 3.08 V, I_OH = −4 mA		V_(VDDIO) - 0.4		V_(VDDIO)	V
V_OL	Low level output voltage	V_(VDDIO) =2.52 V to 3.08V I_OL = 4 mA		GND		0.4	V
I_OS	Output short-circuit current	V_OUT = 0 V	Serializer GPO outputs		–11		mA
I_OZ	Tri-state output current	PDB = 0 V, V_OUT = 0 V or V_(VDDIO)	Serializer GPO outputs	–20		20	µA
C_GPO	Pin capacitance	GPO [3:0]			1.5		pF
CML DRIVER DC SPECIFICATIONS (DOUT+, DOUT–)
V_OD	Differential output voltage	R_L = 100 Ω (Figure 6-6)		640		824	mV
V_OUT	Single-ended output voltage	R_L = 50 Ω (Figure 6-6)		320		412	mV
ΔV_OD	Differential output voltage unbalance	R_L = 100 Ω			1	50	mV
V_OS	Output offset voltage	R_L = 100 Ω (Figure 6-6)			V_{(VDD_n)} – (V_OD /2)		V
ΔV_OS	Offset voltage unbalance	R_L = 100 Ω			1	50	mV
I_OS	Output short-circuit current	DOUT+ = 0 V or DOUT– = 0 V			–26		mA
R_T	Differential internal termination resistance	Differential across DOUT+ and DOUT–		80	100	120	Ω
R_T	Single-ended termination resistance	DOUT+ or DOUT–		40	50	60	Ω
SERIALIZER SUPPLY CURRENT
I_DDT	Serializer (Tx) V_{(VDD_n)} supply current (includes load current)	R_L = 100 Ω WORST CASE pattern (Figure 6-2)	V_{(VDD_n)} = 1.89 V V_(VDDIO) = 3.6 V ƒ = 100 MHz, 12-bit mode Default registers		76	95	mA
I_DDT		R_L = 100 Ω WORST CASE pattern (Figure 6-2)	V_{(VDD_n)} = 1.89 V V_(VDDIO) = 3.6 V ƒ = 75 MHz, 12-bit mode Default registers		61	80	mA
I_DDT	Serializer (Tx) V_{(VDD_n)} supply current (includes load current)	R_L = 100 Ω RANDOM PRBS-7 pattern	V_{(VDD_n)} = 1.89 V V_(VDDIO) = 3.6 V ƒ = 100 MHz, 12-bit mode Default Registers		80		mA
I_DDT		R_L = 100 Ω RANDOM PRBS-7 pattern	V_{(VDD_n)} = 1.89 V V_(VDDIO) = 3.6 V ƒ = 75 MHz, 12-bit mode Default Registers		64		mA
I_(VDDIO)T	Serializer (Tx) V_(VDDIO) supply current (includes load current)	R_L = 100 Ω WORST CASE pattern (Figure 6-2)	V_(VDDIO) = 1.89 V ƒ = 75 MHz, 12-bit mode Default Registers		1.5	3	mA
I_(VDDIO)T		R_L = 100 Ω WORST CASE pattern (Figure 6-2)	V_(VDDIO) = 3.6 V ƒ = 75 MHz, 12-bit mode Default registers		5	8	mA
I_DDTZ	Serializer (Tx) supply current power down	PDB = 0 V; All other LVCMOS inputs = 0 V	V_(VDDIO)=1.89 V Default registers		300	1000	µA
I_DDTZ	Serializer (Tx) supply current power down	PDB = 0 V; All other LVCMOS inputs = 0 V	V_(VDDIO) = 3.6 V Default registers		300	1000	µA
I_(VDDIO)TZ	Serializer (Tx) V_(VDDIO) supply current power down	PDB = 0 V; All other LVCMOS inputs = 0 V	V_(VDDIO) = 1.89 V Default registers		15	100	µA
I_(VDDIO)TZ	Serializer (Tx) V_(VDDIO) supply current power down	PDB = 0 V; All other LVCMOS inputs = 0 V	V_(VDDIO) = 3.6 V Default registers		15	100	µA

(1) The Electrical Characteristics tables list verified specifications under the listed Section 6.3 except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not verified.

(2) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground except V_OD and ΔV_OD which are differential voltages.

(3) Typical values represent most likely parametric norms at 1.8 V or 3.3 V, T_A = 25°C, and at the Section 6.3 at the time of product characterization and are not verified.

封装选项

机械数据 (封装 | 引脚)

散热焊盘机械数据 (封装 | 引脚)

订购信息

6.5 Electrical Characteristics