ZHCSNH8B July   2021  – November 2021 INA823

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Gain-Setting Function
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 Input Common-Mode Voltage Range
      3. 8.3.3 Input Protection
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Bias Current Return Path
    2. 9.2 Typical Applications
      1. 9.2.1 Resistive-Bridge Pressure Sensor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Supporting High Common-Mode Voltage in PLC Input Modules
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 PSpice® for TI
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Electrical Characteristics

at TA = 25°C, VS = ±15 V, RL = 10 kΩ, VCM = VREF = 0 V, and G = 1 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOSI Input stage offset voltage(1)(3) 20 100 µV
TA = –40°C to +125°C(3) 190
0.2 1.2 µV/°C
VOSO Output stage offset voltage(1)(3) 140 450 µV
TA = –40°C to +125°C(2) 850
1 5 µV/°C
PSRR Power-supply rejection ratio VS = ±1.35 V to ±18 V G = 1, RTI 100 130 dB
G = 10, RTI 115 148
G = 100, RTI 120 148
G = 1000, RTI 120 148
ZIN Input impedance 12 || 8.5 GΩ || pF
RFI filter, –3-dB frequency 20 MHz
VCM Operating input voltage(5) VS = ±1.35 V to ±18 V (–VS) – 0.15 (+VS) – 1 V
TA = –40°C to +125°C See Figure 7-53
Input overvoltage TA = –40°C to +125°C(2) ±60 V
CMRR Common-mode rejection ratio At dc to 60 Hz, RTI, VCM = (V–) –0.15 V to (V+) – 1 V,
G = 1
84 110 dB
At dc to 60 Hz, RTI, VCM = (V–) –0.15 V to (V+) – 1 V,
G = 10
104 136
At dc to 60 Hz, RTI, VCM = (V–) –0.15 V to (V+) – 1 V,
G ≥ 100
120 149
BIAS CURRENT
IB Input bias current 1.2 8 nA
TA = –40°C to +125°C 2.4
15 pA/°C
IOS Input offset current 0.4 4 nA
TA = –40°C to +125°C 0.8
4 pA/°C
NOISE VOLTAGE
eNI Input stage voltage noise density(6) f = 1 kHz, G = 1000, RS = 0 Ω 21 nV/√Hz
Input stage voltage noise(6) fB = 0.1 Hz to 10 Hz, G = 1000, RS = 0 Ω 0.4 µVPP
eNO Output stage voltage noise density(6) f = 1 kHz, RS = 0 Ω 120 nV/√Hz
Output stage voltage noise(6) fB = 0.1 Hz to 10 Hz, RS = 0 Ω 5 µVPP
in Current noise density f = 1 kHz 160 fA/√Hz
Current noise fB = 0.1 Hz to 10 Hz, G = 100 5 pAPP
GAIN
Gain equation 1 + (100 kΩ / RG) V/V
G Gain 1 10000 V/V
GE Gain error(6) VO = ±10 V G = 1 ±0.01 ±0.04 %
G = 10 ±0.025 ±0.2
G = 100 ±0.025 ±0.2
G = 1000 ±0.05 ±0.2
Gain drift(6) TA = –40°C to +125°C G = 1 ±0.2 ±5 ppm/°C
G > 1 ±12 ±35
Gain nonlinearity G = 1 to 10 2 10 ppm
G > 10 5
G = 1 to 100, RL = 2 kΩ 15
OUTPUT
Output voltage swing (–VS) + 0.15 (+VS) – 0.15 V
Load capacitance Stable operation 1000 pF
ZOUT Closed-loop output impedance See Figure 7-37
ISC Short-circuit current Continuous to VS / 2 ±20 mA
FREQUENCY RESPONSE
BW Bandwidth, –3 dB G = 1 1.9 MHz
G = 10 350 kHz
G = 100 60
G = 1000 6
SR Slew rate G = 1, VO = ±10 V 0.9 V/µs
tS Settling time To 0.01% G = 1 to 10, VSTEP = 10 V 12 µs
G = 100, VSTEP = 10 V 28
G = 1000, VSTEP = 10 V 260
To 0.001% G = 1 to 10, VSTEP = 10 V 14
G = 100, VSTEP = 10 V 33
G = 1000, VSTEP = 10 V 290
REFERENCE INPUT
RIN Input impedance 100 kΩ
Reference input voltage (–VS) (+VS) V
Gain to output 1 V/V
Reference gain error inside the output voltage swing  0.01 0.05 %
POWER SUPPLY
IQ Quiescent current VIN = 0 V 180 250 µA
TA = –40°C to +125°C 300
Total offset, referred-to-input (RTI): VOS = (VOSI) + (VOSO / G).
Specified by characterization.
Offset drifts are uncorrelated. Input-referred offset drift is calculated using: ΔVOS(RTI) = √[ΔVOSI2 + (ΔVOSO / G)2].
Input voltage range of the instrumentation amplifier input stage. The input range depends on the common-mode voltage, differential voltage, gain, and reference voltage. See Typical Characteristic curves for more information.
The values specified for G > 1 do not include the effects of the external gain-setting resistor, RG.
Total RTI voltage noise is equal to: eN(RTI) = √[eNI2 + (eNO / G)2].