The device includes an internal feedback resistor voltage divider. The internal feedback resistor voltage divider is connected to the negative input of the internal transconductance error amplifier, and the TRK pin voltage programs the positive input of the internal transconductance error amplifier after the soft start is finished. The internal transconductance error amplifier features high output resistance (R_O = 10 MΩ) and wide bandwidth (BW = 3 MHz) and sinks (or sources) current which is proportional to the difference between the negative and the positive inputs of the error amplifier.

The output of the error amplifier is connected to the COMP pin, allowing the use of a Type-2 loop compensation network. R_COMP, C_COMP, and an optional C_HF loop compensation components configure the error amplifier gain and phase characteristics to achieve a stable loop response. This compensation network creates a pole at very low frequency, a mid-band zero, and a high frequency pole.

The PWM comparator in Figure 7-13 compares the sum of the amplified sensed inductor current and the slope compensation ramp with the sum of the COMP pin voltage and a –690 mV internal offset, and terminates the present cycle if the sum of the amplified sensed inductor current and the slope compensation ramp is greater than the sum of the COMP pin voltage and the –690 mV internal offset.