The device provides N-channel logic MOSFET drivers, which can source a peak current of 2.2 A and sink a peak current of 3.3 A. The LO driver is powered by VCC, and is enabled when EN is greater than V_EN and VCC is greater than V_VCC-UVLO. The HO driver is powered by HB, and is enabled when EN is greater than V_EN and HB-SW voltage is greater than HB UVLO threshold (V_HB-UVLO).

When the SW pin voltage is approximately 0 V by turning on the low-side MOSFET, the C_HB is charged from VCC through the internal boot diode. The recommended value of the C_HB is 0.1 μF.

The LO and HO outputs are controlled with an adaptive dead-time methodology which ensures that both outputs are not turned on at the same time. When the device commands LO to be turned on, the adaptive dead-time logic first turns off HO and waits for HO-SW voltage to drop. LO is then turned on after a small delay (t_DHL). Similarly, the HO driver turn-on is delayed until the LO-PGND voltage has discharged. HO is then turned on after a small delay (t_DLH).

If the BIAS pin voltage is below the 5-V VCC regulation target, take extra care when selecting the MOSFETs. The gate plateau voltage of the MOSFET switch must be less than the BIAS pin voltage to completely enhance the MOSFET, especially during start-up at low BIAS pin voltage. If the driver output voltage is lower than the MOSFET gate plateau voltage during start-up, the converter may not start up properly and it can stick at the maximum duty cycle in a high-power dissipation state. This condition can be avoided by selecting a lower threshold MOSFET or by turning on the device when the BIAS pin voltage is sufficient. Care should be taken when the converter operates in bypass at any conditions. During the bypass operation, the minimum HO-SW voltage is 3.75 V.

The hiccup mode fault protection is triggered by the HB UVLO. If the HB-SW voltage is less than the HB UVLO threshold (V_HB-UVLO), the LO turns on by force for 75 ns to replenish the boost capacitor. The device allows up to four consecutive replenish switching. After the maximum four consecutive boot replenish switching, the device skips switching for 12 cycles. If the device fails to replenish the boost capacitor after the four sets of the four consecutive replenish switching, the device stops switching and enters 512 cycles of hiccup mode off-time. During the hiccup mode off-time, PGOOD and SS are grounded.

If required, the slew rate of the switching node voltage can be adjusted by adding a gate resistor in parallel with pulldown PNP transistor. Extra care should be taken when adding the gate resistor since it can decrease the effective dead-time.

Figure 7-19 Slew Rate Control