ZHCSK76 September   2019 LM74202-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      12V 条件下的 ISO16750-2 负载突降脉冲 5b 性能
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1      Absolute Maximum Ratings
    2. 6.2      ESD Ratings
    3. 6.3      Recommended Operating Conditions
    4. Table 1. Thermal Information
    5. 6.4      Electrical Characteristics
    6. 6.5      Timing Requirements
    7. 6.6      Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Overvoltage Protection (OVP)
      3. 8.3.3 Reverse Battery Protection
      4. 8.3.4 Hot Plug-In and In-Rush Current Control
      5. 8.3.5 Overload and Short Circuit Protection
        1. 8.3.5.1 Overload Protection
          1. 8.3.5.1.1 Active Current Limiting
          2. 8.3.5.1.2 Electronic Circuit Breaker with Overload Timeout, MODE = OPEN
        2. 8.3.5.2 Short Circuit Protection
          1. 8.3.5.2.1 Start-Up With Short-Circuit On Output
        3. 8.3.5.3 FAULT Response
          1. 8.3.5.3.1 Look Ahead Overload Current Fault Indicator
        4. 8.3.5.4 Current Monitoring
        5. 8.3.5.5 IN, OUT, RTN and GND Pins
        6. 8.3.5.6 Thermal Shutdown
        7. 8.3.5.7 Low Current Shutdown Control (SHDN)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step by Step Design Procedure
        2. 9.2.2.2 Setting Undervoltage Lockout and Overvoltage Set Point for Operating Voltage Range
        3. 9.2.2.3 Programming the Current-Limit Threshold—R(ILIM) Selection
        4. 9.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 9.2.2.5 Limiting the Inrush Current
          1. 9.2.2.5.1 Selection of Input TVS for Transient Protection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.3.5.5 IN, OUT, RTN and GND Pins

The device has two pins for input (IN) and output (OUT). All IN pins must be connected together and to the power source. A ceramic bypass capacitor close to the device from IN to GND is recommended to alleviate bus transients. The recommended input operating voltage range is 4.2 V to 40 V. Similarly all OUT pins must be connected together and to the load. V(OUT), in the ON condition, is calculated using Equation 9.

Equation 9. LM74202-Q1 equ_07_SLVSDG2.gif

where

  • RON is the total ON resistance of the internal FETs.

The GND pin must be connected to the system ground. RTN is the device ground reference for all the internal control blocks. Connect the device support components: R(ILIM), C(dVdT), R(IMON), R(MODE) and resistors for UVLO and OVP with respect to the RTN pin. Internally, the device has reverse input polarity protection block between RTN and the GND terminal. Connecting RTN pin to GND pin disables the reverse input polarity protection feature. if negative input voltage is applied on IN pins with RTN pin connected to GND, the device can get damaged.

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