SNOSDF9B July 2023 – March 2024 LMG2100R044
PRODUCTION DATA
Figure 8-2 shows a synchronous buck converter application with VCC connected to a 5-V supply. It is critical to optimize the power loop (loop impedance from VIN capacitor to PGND). Having a high power loop inductance causes significant ringing in the SW node and also causes the associated power loss. The LMG2100R044 has VIN and PGND pins next to each other. This enables the VIN capacitor to be placed very close to LMG2100R044 on the top layer of the PCB, minimizing power loop inductance.