The LMG2610 implements cycle-by-cycle over-current protection for both half-bridge GaN power FETs. Figure 8-5 shows the cycle-by-cycle over-current operation. Every INx logic-high cycle turns on the GaN power FET. If the GaN power FET drain current exceeds the over-current threshold current, the over-current protection turns off the GaN power FET for the remainder of the INx logic-high duration.

An over-current protection event is not reported on the FLT pin. Cycle-by-cycle over-current protection minimizes system disruption because the event is not reported and because the protection allows the GaN power FET to turn on every INx cycle.

The low-side / high-side over-current protection threshold currents are set to different levels corresponding to the different GaN power FET sizes. As described in Current-Sense Emulation, an artificial CS pin current is produced after the low-side GaN power FET is turned off by the low-side over-current protection, to prevent the controller from entering a hung state.