7.3.1 WSON-8 Control Pins and SOT-23-5 Comparison

The LMH6629 WSON-8 package has two digital control pins; PD and COMP pins. The PD pin, used for power down, floats high (device on) when not driven. When the PD pin is pulled low, the amplifier is disabled and the amplifier output stage goes into a high impedance state so the feedback and gain set resistors determine the output impedance of the circuit. The other control pin, the COMP pin, allows control of the internal compensation and defaults to the lower gain mode or logic 0.

The SOT-23-5 package has the following differences relative to the WSON-8 package:

1. No power down (shutdown) capability.
2. No COMP pin to set the minimum stable gain. SOT-23–5 package minimum stable gain is internally fixed to be 10V/V.
3. No feedback (FB) pin.

From a performance point of view, the WSON-8 and the SOT-23-5 packages perform very similarly except in the following areas:

1. SSBW, Peaking, and 0.1 dB Bandwidth: These differences are highlighted in the Typical Performance Characteristics and the Electrical Characteristics 5V tables. Most notable differences are with small signal (0.2 Vpp) and close to the minimum stable gain of 10V/V.
2. Distortion: It is possible to get slightly different distortion performance. The board layout and decoupling capacitor return current routing strongly influence distortion performance.
3. Output Current: In heavy current applications, there will be differences between these package types because of the difference in their respective Thermal Resistances (R_θJA).

7.3.2 Compensation

The LMH6629 has two compensation settings that can be controlled by the COMP pin (WSON-8 package only). The default setting is set through an internal pulldown resistor and places the COMP pin at the logic 0 state. In this configuration the on-chip compensation is set to the maximum and bandwidth is reduced to enable stability at gains as low as 4V/V.

When this pin is driven to the logic 1 state, the internal compensation is decreased to allow higher bandwidth at higher gains. In this state, the minimum stable gain is 10V/V. Due to the reduced compensation, slew rate and large signal bandwidth are significantly enhanced for the higher gains.

It is possible to externally compensate the LMH6629 for any of the following reasons, as shown in Figure 50.

• To operate the SOT-23-5 package (which does not offer the COMP pin) at closed loop gains < 10V/V.
• To operate the WSON-8 package at gains below the minimum stable gain of 4V /V when the COMP pin is LO. NOTE: In this case, Figure 50 “Constraint 1” may be changed to ≥ 4 V/V instead of ≥ 10 V/V.
• To operate either package at low gain and need maximum slew rate (COMP pin HI).

Figure 50. External Compensation

This circuit operates by increasing the Noise Gain (NG) beyond the minimum stable gain of the LMH6629 while maintaining a positive loop gain phase angle at 0 dB. There are two constraints shown in Figure 50: “Constraint 1” ensures that NG has increased to at least 10 V/V when the loop gain approaches 0dB, and “Constraint 2” places an upper limit on the feedback phase lead network frequency to make sure it is fully effective in the frequency range when loop gain approaches 0dB. These two constraints allow one to estimate the “starting value” for R_c and C_c which may need to be fine tuned for proper response.

Here is an example worked out for more clarification:

• Assume that the objective is to use the SOT-23-5 version of the LMH6629 for a closed loop gain of +3.7 V/V using the technique shown in Figure 50.
• Selecting R_f = 249 Ω → R_g = 91 Ω → R_EQ= 66.6 Ω.
• For 50-Ω source termination (R_s= 50 Ω), select R_T= 50 Ω → R_p = 25 Ω.
• Using “Constraint 1” (= 10V/V) allows one to compute Rc ≊ 56 Ω. Using “Constraint 2” (= 90 MHz) defines the appropriate value of C_c ≊ 33 pF.
• The frequency response plot shown in Figure 51 is the measured response with R_c and C_c values computed above and shows a -3 dB response of about 1 GHz.

Cf = 1.5 pF
RA = 33 Ω
RB = 91 Ω

Figure 51. SOT-23-5 Package Low Closed Loop Gain Operation
with External Compensation

For the Figure 51 measured results, a compensation capacitor (C_f') was used across R_f to compensate for the summing node net capacitance due to the board and the SOT-23–5 LMH6629. The R_A and R_B combination reduces the effective capacitance of Cf‘ by the ratio of 1+R_B / R_A, with the constraint that R_B << R_f, thereby allowing a practical capacitance value (> 1pF) to be used. The WSON-8 package does not need this compensation across R_f due to its lower parasitics.

With the COMP pin HI (WSON-8 package only) or with the SOT-23–5 package, this circuit achieves high slew rate and takes advantage of the LMH6629’s superior low-noise characteristics without sacrificing stability, while enabling lower gain applications. It should be noted that the R_c, C_c combination does lower the input impedance and increases noise gain at higher frequencies. With these values, the input impedance reduces by 3 dB at 490 MHz. The Noise Gain transfer function “zero” is given by Equation 1 and it has a 3-dB increase at 32.8 MHz with these values:

External Compensation Noise Gain Increase:

Equation 1.

7.3.3 Cancellation of Offset Errors Due to Input Bias Currents

The LMH6629 offers exceptional offset voltage accuracy. In order to preserve the low offset voltage errors, care must be taken to avoid voltage errors due to input bias currents. This is important in both inverting and non-inverting applications.

The non-inverting circuit is used here as an example. To cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting (R_g) and feedback (R_f) resistors should equal the equivalent source resistance (R_seq) as defined in Figure 52. Combining this constraint with the non-inverting gain equation also seen in Figure 52 allows both R_f and R_g to be determined explicitly from Equation 2:

Figure 52. Non-Inverting Amplifier Configuration

When driven from a 0-Ω source, such as the output of an op amp, the non-inverting input of the LMH6629 should be isolated with at least a 25-Ω series resistor.

As seen in Figure 53, bias current cancellation is accomplished for the inverting configuration by placing a resistor (R_b) on the non-inverting input equal in value to the resistance seen by the inverting input (R_f || (R_g+R_s)). R_b should to be no less than 25 Ω for optimum LMH6629 performance. A shunt capacitor (not shown) can minimize the additional noise of R_b.

Figure 53. Inverting Amplifier Configuration

7.3.4 Total Input Noise vs. Source Resistance

To determine maximum signal-to-noise ratios from the LMH6629, an understanding of the interaction between the amplifier’s intrinsic noise sources and the noise arising from its external resistors is necessary. Figure 54 describes the noise model for the non-inverting amplifier configuration showing all noise sources. In addition to the intrinsic input voltage noise (e_n) and current noise (i_n = i_n⁺ = i_n⁻) source, there is also thermal voltage noise (e_t = √(4KTR)) associated with each of the external resistors.

Figure 54. Non-Inverting Amplifier Noise Model

Equation 3 provides the general form for total equivalent input voltage noise density (e_ni).

General Noise Equation:

Equation 3.

Equation 4 is a simplification of Equation 3 that assumes R_f || R_g = R_seq for bias current cancellation:

Equation 4.

Equation 4: Noise Equation with R_f || R_g = R_seq

Figure 55 schematically shows e_ni alongside V_IN (the portion of V_S source which reaches the non-inverting input of Figure 52) and external components affecting gain (A_v= 1 + R_f / R_g), all connected to an ideal noiseless amplifier.

Figure 55. Non-Inverting Amplifier Equivalent Noise Source Schematic

Figure 56 illustrates the equivalent noise model using this assumption. Figure 57 is a plot of e_ni against equivalent source resistance (R_seq) with all of the contributing voltage noise source of Equation 4. This plot gives the expected e_ni for a given (R_seq) which assumes R_f||R_g = R_seq for bias current cancellation. The total equivalent output voltage noise (e_no) is e_ni*A_V.

Figure 56. Noise Model with R_f||R_g = R_seq

As seen in Figure 57, e_ni is dominated by the intrinsic voltage noise (e_n) of the amplifier for equivalent source resistances below 15 Ω. Between 15 Ω and 2.5 kΩ, e_ni is dominated by the thermal noise (e_t = √(4kT(2R_seq)) of the equivalent source resistance R_seq. Incidentally, this is the range of R_seq values where the LMH6629 has the best (lowest) Noise Figure (NF) for the case where R_seq = R_f || R_g.

Above 2.5 kΩ, e_ni is dominated by the amplifier’s current noise (i_n = √2 * i_nR_seq). When R_seq = 190 Ω (that is, R_seq = e_n/√2 * i_n), the contribution from voltage noise and current noise of LMH6629 is equal. For example, configured with a gain of +10V/V giving a −3dB of 825 MHz and driven from R_seq = R_f || R_g = 20 Ω (e_ni = 1.07 nV√Hz from Figure 57), the LMH6629 produces a total equivalent output noise voltage (e_ni * 10 V/V * √(1.57 * 825 MHz)) of 385 μV_rms.

RSEQ = RF || RG

Figure 57. Voltage Noise Density vs. Source Resistance

If bias current cancellation is not a requirement, then R_f || R_g does not need to equal R_seq. In this case, according to Equation 3, R_f || R_g should be as low as possible to minimize noise. Results similar to Equation 3 are obtained for the inverting configuration of Figure 53 if R_seq is replaced by R_b and R_g is replaced by R_g + R_s. With these substitutions, Equation 3 will yield an e_ni referred to the non-inverting input. Referring e_ni to the inverting input is easily accomplished by multiplying e_ni by the ratio of non-inverting to inverting gains (1+R_g/ R_f).

7.3.5 Noise Figure

Noise Figure (NF) is a measure of the noise degradation caused by an amplifier.

General Noise Figure Equation:

Equation 5.

Looking at the two parts of the NF expression (inside the log function) yields:

• S_i/ S_o→ Inverse of the power gain provided by the amplifier
• N_o/ N_i→ Total output noise power, including the contribution of R_S, divided by the noise power at the input due to R_S

To simplify this, consider N_a as the noise power added by the amplifier (reflected to its input port):

• S_i/ S_o→ 1/ G
• N_o/ N_i→ G * (N_i+N_a) / N_i (where G*(N_i +N_a ) = N_o)

Substituting these two expressions into the NF expression:

Equation 6.

The noise figure expression has simplified to depend only on the ratio of the noise power added by the amplifier at its input (considering the source resistor to be in place but noiseless in getting N_a) to the noise power delivered by the source resistor (considering all amplifier elements to be in place but noiseless in getting N_i).

For a given amplifier with a desired closed loop gain, to minimize noise figure:

• Minimize R_f || R_g
• Choose the Optimum R_S (R_OPT)

R_OPT is the point at which the NF curve reaches a minimum and is approximated by:

Figure 58 is a plot of NF vs R_S with the circuit of Figure 52 (R_f = 240 Ω, A_V = +10V/V). The NF curves for both Unterminated (R_T = open) and Terminated systems (R_T = R_S) are shown. Table 1 indicates NF for various source resistances including R_S = R_OPT.

f > 1 MHz

Figure 58. Noise Figure vs. Source Resistance

7.3.6 Single-Supply Operation

The LMH6629 can be operated with single power supply as shown in Figure 59. Both the input and output are capacitively coupled to set the DC operating point.

Figure 59. Single-Supply Operation

7.3.7 Low-Noise Transimpedance Amplifier

Figure 60 implements a high-speed, single-supply, low-noise Transimpedance amplifier commonly used with photo-diodes. The transimpedance gain is set by R_F.

Figure 60. 200 MHz Transimpedance Amplifier Configuration

Figure 61 shows the Noise Gain (NG) and transfer function (I-V Gain). As with most Transimpedance amplifiers, it is required to compensate for the additional phase lag (Noise Gain zero at f_Z) created by the total input capacitance ( C_D (diode capacitance) + C_CM (LMH6629 CM input capacitance) + C_DIFF (LMH6629 DIFF input capacitance) ) looking into R_F. This is accomplished by placing C_F across R_F to create enough phase lead (Noise Gain pole at f_P) to stabilize the loop.

Figure 61. Transimpedance Amplifier Noise Gain and Transfer Function

The optimum value of C_F is given by Equation 8 resulting in the I-V -3dB bandwidth shown in Equation 9, or around 200 MHz in this case (assuming GBWP= 4GHz with COMP pin = HI for WSON-8 package). This C_F value is a “starting point” and C_F needs to be tuned for the particular application as it is often less than 1 pF and thus is easily affected by board parasitics. For maximum speed, the LMH6629 COMP pin should be HI (or use the SOT-23 package).

Optimum C_F Value:

Equation 8.

Resulting -3dB Bandwidth

Equation 9.

Equation 10 provides the total input current noise density (i_ni) equation for the basic Transimpedance configuration and is plotted against feedback resistance (R_F) showing all contributing noise sources in Figure 62. The plot indicates the expected total equivalent input current noise density (i_ni) for a given feedback resistance (R_F). This is depicted in the schematic of Figure 63 where total equivalent current noise density (i_ni) is shown at the input of a noiseless amplifier and noiseless feedback resistor (R_F). The total equivalent output voltage noise density (e_no) is i_ni*R_F.

Noise Equation for Transimpedance Amplifier:

Equation 10.

Figure 62. Current Noise Density vs. Feedback Resistance

Figure 63. Transimpedance Amplifier Equivalent Input Source Model

From Figure 62, it is clear that with LMH6629’s extremely low-noise characteristics, for R_F < 2.5 kΩ, the noise performance is entirely dominated by R_F thermal noise. Only above this R_F threshold, LMH6629’s input noise current (i_n) starts being a factor and at no R_F setting does the LMH6629 input noise voltage play a significant role. This noise analysis has ignored the possible noise gain increase, due to photo-diode capacitance, at higher frequencies.

7.3.8 Low-Noise Integrator

Figure 64 shows a deBoo integrator implemented with the LMH6629. Positive feedback maintains integration linearity. The LMH6629’s low input offset voltage and matched inputs allow bias current cancellation and provide for very precise integration. Keeping R_G and R_S low helps maintain dynamic stability.

Figure 64. Low-Noise Integrator

7.3.9 High-Gain Sallen-Key Active Filters

The LMH6629 is well suited for high-gain Sallen-Key type of active filters. Figure 65 shows the 2^nd order Sallen-Key low-pass filter topology. Using component predistortion methods discussed in OA-21, Component Pre-Distortion for Sallen Key Filters (SNOA369), enables the proper selection of components for these high-frequency filters.

Figure 65. Low Pass Sallen-Key Active Filter Topology