ZHCSOD6E December   2003  – August 2023 OPA1632

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Function
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
        2. 8.4.1.2 Power Dissipation and Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Revision History

Changes from Revision D (March 2022) to Revision E (August 2023)

  • 将 MSOP 封装的所有实例更改为 VSSOP 封装,将 MSOP PowerPAD 的所有实例更改为 HVSSOPGo
  • Changed ambient temperature in Recommended Operating Conditions to show only −40°C to +85°CGo
  • Changed thermal specifications for DGN package in Thermal Information tableGo
  • Changed Electrical Characteristics (EC) to combine both tables in to one table for both packagesGo
  • Changed PSRR minimum limit of 316 µV/V to maximum limit in EC table for DGN package.Go
  • Changed input offset drift, input voltage noise, small and large signal bandwidth, slew rate, rise and fall time, settling time, output voltage swing, and closed-loop output impedance to show improved valuesGo
  • Changed typical and maximum input bias current from 2 µA to 7.9 µA and 6 µA to 14 µA, respectively for DGN package.Go
  • Changed input current noise from 0.4 pA/√Hz to 1.7 pA/√Hz in EC table for DGN packageGo
  • Changed input impedance spec to show both common-mode and differential impedances in EC table for DGN package.Go
  • Changed typical THD+N with differential input/output and RL = 2 kΩ from 0.000022% to 0.000028% in EC table for DGN package.Go
  • Changed IMD of differential input/output and RL = 2 kΩ from 0.00005% to 0.000061% in EC table for DGN package.Go
  • Changed voltage output swing low and high to a typical only for a load of 2 kΩ in the EC table for DGN package.Go
  • Changed the enable and disable voltage threshold from (V−) + 2 V and (V−) 0.8 V to (V−) + 1.45 V and (V−) 1.4 V, respectively, for DGN package.Go
  • Changed one Turn-on delay specification to Turn-off delay in Electrical Characteristics tableGo
  • Deleted the DGN Typical Characteristics section and combined all plots into one section.Go
  • Changed text in Power Dissipation and Thermal Considerations section to reference Absolute Maximum Ratings for junction temperatureGo

Changes from Revision C (September 2015) to Revision D (March 2022)

  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 将“特性”部分中的失真规格从 0.000022% 更改为 0.000028%Go
  • 将“特性”部分中的噪声规格从 1.3nV/√Hz 更改为 1.25nV/√Hz Go
  • 将“特性”部分中的压摆率规格从 50V/μs 更改为 72V/μsGo
  • 更新了特性 部分Go
  • 更新了应用 部分Go
  • 更新了说明 部分Go
  • 更改了说明 部分中 SOIC 和 MSOP-PowerPAD 封装的标称封装尺寸Go
  • Added note on electrical isolation of DGN package thermal pad.Go
  • Updated Pin Configuration and Functions sectionGo
  • Added Supply turn-on/off dV/dT specification to Absolute Maximum Ratings tableGo
  • Added continuous input current specification to Absolute Maximum Ratings tableGo
  • Changed differential input voltage in Absolute Maximum Ratings table from ±3V to ±1.5V Go
  •  Changed charged-device model (CDM) reference from JESD22-C101 to JS-002 in ESD Ratings tableGo
  • Changed minimum temperature range from 0.4℃ to -40℃ in Recommended Operating Conditions tableGo
  • Changedthermal specifications for D package in Thermal Information tableGo
  • Changed RθJA from 114.5°C/W to 126.3°C/W for D Package in Thermal Information tableGo
  • Changed RθJC(top) from 60.3°C/W to 67.3°C/W for D package in Thermal Information tableGo
  • Changed RθJB from 54.8°C/W to 69.8°C/W for D package in Thermal Information tableGo
  • Changed ψJT from 14°C/W to 19.5°C/W for D package in Thermal Information tableGo
  • Changed ψJT from 54.3°C/W to 69.0°C/W for D package in Thermal Information tableGo
  • Changed typical offset voltage vs temperature from ±5 μV°C to ± 2.5 μV°C in Electrical Characteristics: OPA1632D tableGo
  • Changed PSRR minimum limit of 316 µV/V to maximum limit in Electrical Characteristics: OPA1632D table Go
  • Changed typical input bias current limit from 2 µA to 7.9 µA in Electrical Characteristics: OPA1632D tableGo
  • Changed Max input bias current limit from 6µA to 14µA in Electrical Characteristics: OPA1632D tableGo
  • Changed typical input voltage noise from 1.3nV/√Hz to 1.25nV/√Hz in Electrical Characteristics: OPA1632D tableGo
  • Changed typical input current noise from 0.4 pA/√Hz to 1.7 pA/√Hz in Electrical Characteristics: OPA1632D tableGo
  •  Changed input impedance spec to show both common-mode and differential impedances in Electrical Characteristics: OPA1632D tableGo
  • Changed SSBW at G = +2, RF = 602 Ω from 90 MHz to 104 MHz in Electrical Characteristics: OPA1632D tableGo
  • Changed SSBW at G = +5, RF = 1.5 kΩ from 36 MHz to 46 MHz in Electrical Characteristics: OPA1632D tableGo
  • Changed SSBW at G = +10, RF = 3.01 kΩ from 18 MHz to 24 MHz in Electrical Characteristics: OPA1632D tableGo
  • Changed typical Large-Signal Bandwidth from 800 kHz to 1.8 MHz in Electrical Characteristics: OPA1632D tableGo
  • Changed typical slew rate from 50 V/μs to 72 V/μs in Electrical Characteristics: OPA1632D table Go
  • Changed typical rise/fall time from 100 ns to 69 ns in Electrical Characteristics: OPA1632D tableGo
  • Changed typical settling time to 0.1% from 75 ns to 36 ns in Electrical Characteristics: OPA1632D tableGo
  • Changed typical settling time to 0.01% from 200 ns to 49ns in Electrical Characteristics: OPA1632D table Go
  • Changed typical THD+N with Differential Input/Output and RL = 600 Ω from 0.0003% to 0.00003% in Electrical Characteristics: OPA1632D tableGo
  • Changed typical THD+N with Differential Input/Output and RL = 2 kΩ from 0.000022% to 0.000028% in Electrical Characteristics: OPA1632D table Go
  • Changed typical THD+N with single-ended Input/Output and RL = 600Ω from 0.000059% to 0.000036% in Electrical Characteristics: OPA1632D table Go
  • Changed typical THD+N with single-ended Input/Output and RL = 2 kΩ from 0.000043% to 0.000031% in Electrical Characteristics: OPA1632D tableGo
  • Changed IMD at diferrential input/output and RL= 600Ω from 0.00008% to 0.000061% in Electrical Characteristics: OPA1632D tableGo
  • Changed IMD at diferrential input/output and RL= 2 kΩ from 0.00005% to 0.000061% in Electrical Characteristics: OPA1632D table Go
  • Changed IMD at single-ended input/output and RL= 600Ω from 0.0001% to 0.00007% in Electrical Characteristics: OPA1632D table Go
  • Changed IMD at single-ended input/output and RL= 2kΩ from 0.0007% to 0.000073% in Electrical Characteristics: OPA1632D table Go
  • Removed specified operating voltage specifications from Electrical Characteristics: OPA1632D table Go
  • Changed typical IQ from 14mA to 13mA in Electrical Characteristics: OPA1632D tableGo
  • Added new Typical Characteristics section for D packageGo
  • Updated Feature Description sectionGo
  • Changed description of VOCM pin circuitry in Output Common-mode Voltage and Resistor Matching sectionsGo
  • Updated Output Common-Mode Voltage sectionGo
  • Updated Resistor Matching sectionGo
  • Updated Application Curves sectionGo
  • Changed instances of VCC and VEE to V+ and V- in Power Supply Recommendations sectionGo
  • Updated Power Supply Recommendations sectionGo
  • Changed maximum power dissipation vs ambient temperature curveGo
  • Updated the Power Dissipation and Thermal Considerations sectionGo
  • Added schematic for example layout in Layout Example sectionGo
  • Changed image for example layout in Layout Example sectionGo
  • Updated Layout Example sectionGo
  • Changed list of documentation in Related Documentation sectionGo

Changes from Revision B (January 2010) to Revision C (September 2015)

  • 添加了 ESD 等级 表、特性说明 部分、器件功能模式应用和实施 部分、电源相关建议 部分、布局 部分、器件和文档支持 部分以及机械、封装和可订购信息 部分Go