ZHCSGP3D
September 2017 – December 2018
OPA2837
,
OPA837
PRODUCTION DATA.
1
特性
2
应用
具有真正接地输入和输出范围的低功耗、低噪声、精密单端 SAR ADC 驱动器
3
说明
Device Images
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information: OPA837
6.5
Thermal Information: OPA2837
6.6
Electrical Characteristics: VS = 5 V
6.7
Electrical Characteristics: VS = 3 V
6.8
Typical Characteristics: VS = 5.0 V
6.9
Typical Characteristics: VS = 3.0 V
6.10
Typical Characteristics: ±2.5-V to ±1.5-V Split Supply
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
OPA837 Comparison
7.3.2
Input Common-Mode Voltage Range
7.3.3
Output Voltage Range
7.3.4
Power-Down Operation
7.3.5
Low-Power Applications and the Effects of Resistor Values on Bandwidth
7.3.6
Driving Capacitive Loads
7.4
Device Functional Modes
7.4.1
Split-Supply Operation (±1.35 V to ±2.7 V)
7.4.2
Single-Supply Operation (2.7 V to 5.4 V)
8
Application and Implementation
8.1
Application Information
8.1.1
Noninverting Amplifier
8.1.2
Inverting Amplifier
8.1.3
Output DC Error Calculations
8.1.4
Output Noise Calculations
8.1.5
Instrumentation Amplifier
8.1.6
Attenuators
8.1.7
Differential to Single-Ended Amplifier
8.1.8
Differential-to-Differential Amplifier
8.1.9
Pulse Application With Single-Supply Circuit
8.1.10
ADC Driver Performance
8.2
Typical Applications
8.2.1
Active Filters
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.2.2
Implementing a 2:1 Active Multiplexer
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.3
1-Bit PGA Operation
8.2.3.1
Design Requirements
8.2.3.2
Detailed Design Procedure
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
器件和文档支持
11.1
文档支持
11.1.1
相关文档
11.2
相关链接
11.3
接收文档更新通知
11.4
社区资源
11.5
商标
11.6
静电放电警告
11.7
术语表
12
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
DCK|5
MPDS025J
DBV|6
MPDS026Q
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsgp3d_oa
zhcsgp3d_pm
6.9
Typical Characteristics: V
S
= 3.0 V
at V
S+
= 3.0 V, V
S–
= 0 V, V
OUT
= 1 V
PP
, R
F
= 0 Ω, R
L
= 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, and T
A
≈ 25°C (unless otherwise noted)
See
Figure 74
and
Table 2
, V
OUT
= 20 mV
PP
, R
LOAD
= 2 kΩ
Figure 19.
Noninverting Small-Signal Response vs Gain
See
Figure 74
, gain = 2 V/V
Figure 21.
Noninverting Large-Signal Bandwidth vs V
OPP
See
Figure 74
and
Table 2
, V
OUT
= 200 mV
PP
, R
LOAD
= 2 kΩ
Figure 23.
Noninverting Response Flatness vs Gain
See
Figure 74
and
Table 2
, gain = 2 V/V,
input edge rate set to stay below slew limiting
Figure 25.
Noninverting Step Response vs V
OPP
See
Figure 74
and
Table 2
Figure 27.
Simulated Noninverting Settling Time
See
Figure 74
and
Table 2
, gain = 2 V/V
Figure 29.
Noninverting Overdrive Recovery
See
Figure 74
,
Figure 75
,
Table 2
, and
Table 3
, V
OUT
= 1 V
PP
, R
LOAD
= 2 kΩ
Figure 31.
Harmonic Distortion vs Frequency
See
Figure 74
,
Figure 75
,
Table 2
, and
Table 3
, R
LOAD
= 2 kΩ,
f = 100 kHz
Figure 33.
Harmonic Distortion vs Output Swing
See
Figure 87
, gain = 1 V/V, V
OUT
= 1 V
PP
, R
LOAD
= 2 kΩ
Figure 35.
Harmonic Distortion as Active Mux
See
Figure 75
and
Table 3
, V
OUT
= 20 mV
PP
, R
LOAD
= 2 kΩ
Figure 20.
Inverting Small-Signal Response vs Gain
See
Figure 75
, gain = –1 V/V
Figure 22.
Inverting Large-Signal Bandwidth vs V
OPP
See
Figure 75
and
Table 3
, V
OUT
= 200 mV
PP
, R
LOAD
= 2 kΩ
Figure 24.
Inverting Response Flatness vs Gain
See
Figure 75
and
Table 3
, gain = –1 V/V,
input edge rate set to stay below slew limiting
Figure 26.
Inverting Step Response vs V
OPP
See
Figure 75
and
Table 3
Figure 28.
Simulated Inverting Settling Time
See
Figure 75
and
Table 3
, gain = –1 V/V
Figure 30.
Inverting Overdrive Recovery
See
Figure 74
,
Figure 75
,
Table 2
, and
Table 3
, V
OUT
= 1 V
PP
,
f = 100 kHz, R
LOAD
= 2 kΩ
Figure 32.
Harmonic Distortion vs R
LOAD
See
Figure 74
,
Figure 75
,
Table 2
, and
Table 3
, R
LOAD
= 2 kΩ,
f = 100 kHz, V
OUT
= 1 V
PP
Figure 34.
Harmonic Distortion vs Gain Magnitude
See
Figure 88
, gain of 1 V/V and 2 V/V, V
OUT
= 1 V
PP
,
R
LOAD
= 2 kΩ
Figure 36.
Harmonic Distortion as 1-Bit PGA
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