8.2.2.2 Detailed Design Procedure

Aside from simply connecting the two outputs together as shown in Figure 87, there are several other considerations as well:

• If the source impedance is not 0 Ω, consider adding a resistor in the feedback networks equal to that source impedance to reduce the output DC error resulting from bias currents
• If the logic control can place both channels on at the same time, place 100-Ω resistors inside the feedback loop to limit supply currents when both outputs are active
• If a matched gain is desired for the two inputs, configure the op amps for that gain instead of gain of 1 V/V
• If the load is capacitive, add the required R_OUT before the summing point on each op amp output