米6体育平台手机版

ZHCSB37C November 2012 – November 2014 RF430CL330H

PRODUCTION DATA.

3 Terminal Configuration and Functions

Figure 3-1 shows the pin assignments for the PW package.

Figure 3-1 14-Pin PW Package (Top View)

Figure 3-2 shows the pin assignments for the RGT package.

Figure 3-2 16-Pin RGT Package (Top View)

TERMINAL			I/O	DESCRIPTION
NAME	NO.
NAME	PW	RGT
VCC	1	15	PWR	3.3-V power supply
ANT1	2	1	RF	Antenna input 1
ANT2	3	2	RF	Antenna input 2
RST	4	3	I	Reset input (active low)
E0 (TMS)	5	4	I	I²C address select 0 SPI mode select 0 (JTAG test mode select)
E1 (TDO)	6	5	I (O)	I²C address select 1 SPI mode select 1 (JTAG test data output)
E2 (TDI)	7	6	I	I²C address select 2 (JTAG test data in)
INTO (TCK)	8	7	O	Interrupt output (JTAG test clock)
SCMS/ CS	9	8	I	Serial Communication Mode Select (during device initialization) Chip select (in SPI mode)
SCK	10	9	I	SPI clock input (SPI mode)
SO/SCL	11	10	I/O	SPI slave out (SPI mode) I²C clock (I²C mode)
SI/SDA	12	11	I/O	SPI slave in (SPI mode) I²C data (I²C mode)
VCORE	13	12	PWR	Regulated core supply voltage
VSS	14	13	PWR	Ground supply
NC	-	14, 16		Leave open, No connection

NOTE:

For recommended capacitance values, see Recommended Operating Conditions.

Figure 3-3 Example Application Diagram (I²C Operation) (PW Package Shown)

NOTE:

For recommended capacitance values, see Recommended Operating Conditions.

Figure 3-4 Example Application Diagram (SPI Operation) (PW Package Shown)