ZHCSN78E january 2021 – march 2023 TCAN1043A-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| Supply Characteristics | ||||||||
| tPWRUP | Time required for INH active after VSUP ≥ UVSUP(R) | See Figure 7-10 | 310 | µs | ||||
| tUV | Undervoltage filter time VCC and VIO (1) | VCC ≤ UVCC or VIO ≤ UVIO | 100 | 350 | ms | |||
| tUV(RE-ENABLE) | Re-enable time after undervoltage event (1) | Time for device to return to normal operation from a UVCC or UVIO undervoltage event | 200 | µs | ||||
| Device Characteristics | ||||||||
| tPROP(LOOP1) | Total loop delay, driver input (TXD) to receiver output (RXD) Recessive to dominant | TCAN1043A-Q1 Only | RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 7-6 |
140 | 215 | ns | ||
| tPROP(LOOP2) | Total loop delay, driver input (TXD) to receiver output (RXD) Dominant to recessive | RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 7-6 |
140 | 205 | ns | |||
| tPROP(LOOP1) | Total loop delay, driver input (TXD) to receiver output (RXD) Recessive to dominant | TCAN1043AT-Q1 Only | RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 7-6 |
170 | 255 | ns | ||
| tPROP(LOOP2) | Total loop delay, driver input (TXD) to receiver output (RXD) Dominant to recessive | RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF See Figure 7-6 |
170 | 255 | ns | |||
| tWK(TIMEOUT) | Bus wake-up timeout value (1) | 0.8 | 2 | ms | ||||
| tWK(FILTER) | Bus time to meet filtered bus requirements for wake-up request (1) | 0.5 | 1.8 | µs | ||||
| tSILENCE | Timeout for bus inactivity (1) | Timer is reset and restarted, when bus changes from dominant to recessive or vice versa | 0.6 | 1.2 | s | |||
| tINACTIVE | Standby mode SWE timer timeout period (1) | 3 | 4 | 5 | min | |||
| tBIAS | Bus bias reaction time (1) | Measured from the start of a dominant-recessive-dominant sequence (each phase 6 μs) until VSYM ≥ 0.1 | nSTB = EN = 0 V, RL = 60 Ω, CSPLIT = 4.7 nF See Figure 7-9 and Figure 9-2 |
200 | µs | |||
| tCBF | Bus fault-detection time | 45 ≤ RCM ≤ 70 Ω CL = open |
2.5 | µs | ||||
| tWAKE_HT | Hold time for which WAKE pin voltage should be stable after the rising or falling edge on WAKE pin to recognize LWU. |
5 | 50 | µs | ||||
| Mode Change Characteristics | ||||||||
| tINH_SLP_STB | Time after WUP or LWU event until INH asserted (1) | 100 | µs | |||||
| tMODE1 | Mode change time from leaving the Sleep mode to entering Normal or Silent mode (1) | Time measured from VCC and VIO crossing UV thresholds to entering normal or silent mode. | 20 | µs | ||||
| tMODE2 | Mode change time between normal, silent and standby mode and from sleep to standby mode (1) | Mode change time between normal, silent and standby mode and from sleep to standby mode | 10 | µs | ||||
| tGOTOSLEEP | Minimum hold time for transition to sleep mode (1) | EN = H and nSTB = L | 20 | 50 | µs | |||