ZHCSQV1C March   2020  – December 2022 TCAN1463-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  ESD Ratings - IEC Specifications
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Power Dissipation Ratings
    7. 7.7  Power Supply Characteristics
    8. 7.8  Electrical Characteristics
    9. 7.9  Timing Requirements
    10. 7.10 Switching Characteristics
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Signal Improvement
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Supply Pins
        1. 9.3.1.1 VSUP Pin
        2. 9.3.1.2 VCC Pin
        3. 9.3.1.3 VIO Pin
      2. 9.3.2 Digital Inputs and Outputs
        1. 9.3.2.1 TXD Pin
        2. 9.3.2.2 RXD Pin
        3. 9.3.2.3 nFAULT Pin
        4. 9.3.2.4 EN Pin
        5. 9.3.2.5 nSTB Pin
        6. 9.3.2.6 INH_MASK Pin
      3. 9.3.3 GND
      4. 9.3.4 INH Pin
      5. 9.3.5 WAKE Pin
      6. 9.3.6 CAN Bus Pins
      7. 9.3.7 Faults
        1. 9.3.7.1 Internal and External Fault Indicators
          1. 9.3.7.1.1 Power-Up (PWRON Flag)
          2. 9.3.7.1.2 Wake-Up Request (WAKERQ Flag)
          3. 9.3.7.1.3 Undervoltage Faults
            1. 9.3.7.1.3.1 Undervoltage on VSUP
            2. 9.3.7.1.3.2 Undervoltage on VCC
            3. 9.3.7.1.3.3 Undervoltage on VIO
          4. 9.3.7.1.4 CAN Bus Fault (CBF Flag)
          5. 9.3.7.1.5 TXD Clamped Low (TXDCLP Flag)
          6. 9.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag)
          7. 9.3.7.1.7 TXD Shorted to RXD Fault (TXDRXD Flag)
          8. 9.3.7.1.8 CAN Bus Dominant Fault (CANDOM Flag)
      8. 9.3.8 Local Faults
        1. 9.3.8.1 TXD Clamped Low (TXDCLP)
        2. 9.3.8.2 TXD Dominant Timeout (TXD DTO)
        3. 9.3.8.3 Thermal Shutdown (TSD)
        4. 9.3.8.4 Undervoltage Lockout (UVLO)
        5. 9.3.8.5 Unpowered Devices
        6. 9.3.8.6 Floating Terminals
        7. 9.3.8.7 CAN Bus Short-Circuit Current Limiting
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operating Mode Description
        1. 9.4.1.1 Normal Mode
        2. 9.4.1.2 Silent Mode
        3. 9.4.1.3 Standby Mode
        4. 9.4.1.4 Go-To-Sleep Mode
        5. 9.4.1.5 Sleep Mode
          1. 9.4.1.5.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 9.4.1.5.2 Local Wake-Up (LWU) via WAKE Input Terminal
      2. 9.4.2 CAN Transceiver
        1. 9.4.2.1 CAN Transceiver Operation
          1. 9.4.2.1.1 CAN Transceiver Modes
            1. 9.4.2.1.1.1 CAN Off Mode
            2. 9.4.2.1.1.2 CAN Autonomous: Inactive and Active
            3. 9.4.2.1.1.3 CAN Active
          2. 9.4.2.1.2 Driver and Receiver Function Tables
          3. 9.4.2.1.3 CAN Bus States
  10. 10Application Information Disclaimer
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
      2. 10.1.2 Design Requirements
        1. 10.1.2.1 Bus Loading, Length and Number of Nodes
      3. 10.1.3 Detailed Design Procedure
        1. 10.1.3.1 CAN Termination
      4. 10.1.4 Application Curves
      5. 10.1.5 Power Supply Recommendations
      6. 10.1.6 Layout
        1. 10.1.6.1 Layout Guidelines
        2. 10.1.6.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 商标
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息
9.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag)

TXDDTO is an external flag that is set if the TXD pin is held dominant for t > tTXDDTO. If a TXD DTO condition exists, the nFAULT pin is driven low upon entering silent mode from normal mode. The TXDDTO flag is cleared on the next dominant-to-recessive transition on TXD or upon a transition into normal, standby, go-to-sleep, or sleep modes.
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