ZHCSQ49A December   2022  – June 2024 TCAN3403-Q1 , TCAN3404-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings, IEC Transients
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Characteristics
    6. 6.6  Supply Characteristics
    7. 6.7  Dissipation Ratings
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Description
        1. 8.3.1.1 TXD
        2. 8.3.1.2 GND
        3. 8.3.1.3 VCC
        4. 8.3.1.4 RXD
        5. 8.3.1.5 VIO (TCAN3403-Q1 only)
        6. 8.3.1.6 CANH and CANL
        7. 8.3.1.7 STB (Standby)
        8. 8.3.1.8 SHDN (Shutdown)
      2. 8.3.2 CAN Bus States
      3. 8.3.3 TXD Dominant Timeout (DTO)
      4. 8.3.4 CAN Bus short-circuit current limiting
      5. 8.3.5 Thermal Shutdown (TSD)
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Unpowered Device
      8. 8.3.8 Floating pins
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
      2. 8.4.2 Normal Mode
      3. 8.4.3 Standby Mode
        1. 8.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 8.4.4 Shutdown Mode
      5. 8.4.5 Driver and Receiver Function
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 CAN Termination
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 ISO 11898-2 Compatibility of TCAN340x-Q1 Family of 3.3V CAN Transceivers
        1. 9.3.1.1 Introduction
        2. 9.3.1.2 Differential Signal
        3. 9.3.1.3 Common-Mode Signal
        4. 9.3.1.4 Interoperability of 3.3V CAN in 5V CAN Systems
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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6.9 Switching Characteristics

parameters valid over recommended operating conditions with -40℃ ≤ TJ ≤ 150℃ (Typical values are at VCC = 3.3 V, VIO = 3.3 V for TCAN3403 , Device ambient maintained at 27℃) unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Device Switching Characteristics
tPROP(LOOP1) Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant See Figure 7-4, normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3404, TCAN3403 		95 180 ns
See Figure 7-4  , normal mode, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3403 		102 190 ns
See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3403 		115 210 ns
tPROP(LOOP2) Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive See Figure 7-4 , normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3404, TCAN3403 		120 180 ns
See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3403 		125 190 ns
See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF   
TCAN3403 		140 210 ns
tMODE Mode change time, from normal to standby or from standby to normal See Figure8-5 in TCAN1044A datasheet
See Figure 7-5
 		 30 µs
tSHDN1 Mode change time from normal mode to shutdown mode With TXD = High, Time from SHDN pin (low to high edge 50%) to CANH going from recessive level Vo(rec) to 0.5V 40 µs
tSHDN2 Mode change time from shutdown mode to normal mode With TXD high, time from SHDN pin (high to low edge 50%) to CANH going from 0.5V to Vo(rec) 200 µs
tWK_FILTER Filter time for a valid wake-up pattern See Figure 8-5  0.5 1.8 µs
tWK_TIMEOUT Bus wake-up timeout value 0.8 6 ms
Tstartup Time duration after VCC or VIO hass cleared UV+, and device can resume normal operation 1.5 ms
Tfilter(STB) Filter on STB pin to filter out any glitches 0.5 1 2 µs
Tfilter(SHDN) Filter on SHDN pin to filter out any glitches 0.5 1 2 µs
Driver Switching Characteristics
tprop(TxD-busrec) Propagation delay time, low-to-high TXD edge to driver recessive (dominant to recessive) See Figure 7-2 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = VIO = 3 V to 3.6 V
TCAN3404, TCAN3403 		65 100 ns
See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V
TCAN3403 		67 110 ns
See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V
TCAN3403 		71 110 ns
tprop(TxD-busdom) Propagation delay time, high-to-low TXD edge to driver dominant (recessive to dominant) See Figure 7-2 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = VIO = 3 V to 3.6 V
TCAN3404, TCAN3403 		46 100 ns
See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V
TCAN3403 		48 110 ns
See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V
TCAN3403 		53 110 ns
tsk(p) Pulse skew (|tprop(TxD-busrec) - tprop(TxD-busdom)|) , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, See Figure 7-2 18 28 ns
tR Differential output signal rise time See Figure 7-2 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF 32 57 ns
tF Differential output signal fall time 30 50 ns
tTXD_DTO Dominant timeout See Figure 7-6 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF 1.2 4.0 ms
Receiver Switching Characteristics
tprop(busrec-RXD) Propagation delay time, bus recessive input to RXD high output (dominant to recessive) See Figure 7-3 , STB, SHDN = 0 V,
CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V
TCAN3404, TCAN3403 		55 90 ns
See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V
TCAN3403 		60 90 ns
See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V
TCAN3403 		70 102 ns
tprop(busdom-RXD) Propagation delay time, bus dominant input to RXD low output (recessive to dominant) See Figure 7-3 , STB, SHDN = 0 V,
CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V
TCAN3404, TCAN3403 		45 90 ns
See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V
TCAN3403 		51 90 ns
See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V
TCAN3403 		60 100 ns
tR RXD output signal rise time See Figure 7-3 , STB, SHDN = 0 V
CL(RXD) = 15 pF		 10 25 ns
tF RXD output signal fall time 10 28 ns
FD Timing Characteristics
tBIT(BUS) Bit time on CAN bus output pins with tBIT(TXD) = 500 ns See Figure 7-4 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF 450 525 ns
Bit time on CAN bus output pins with tBIT(TXD) = 200 ns 160 205 ns
Bit time on CAN bus output pins with tBIT(TXD) = 125 ns(1) 85 130 ns
tBIT(RXD) Bit time on RXD output pins with tBIT(TXD) = 500 ns See Figure 7-4 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF 410 540 ns
Bit time on RXD output pins with tBIT(TXD) = 200 ns 130 210 ns
Bit time on RXD output pins with tBIT(TXD) = 125 ns(1) 75 135 ns
ΔtREC Receiver timing symmetry with tBIT(TXD) = 500 ns See Figure 7-4 , STB, SHDN = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF
ΔtREC = tBIT(RXD) - tBIT(BUS)		 -50 20 ns
Receiver timing symmetry with tBIT(TXD) = 200 ns -40 10 ns
Receiver timing symmetry with tBIT(TXD) = 125 ns(1) -40 10 ns
(1) Min/Max limits based on characterization.
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