ZHCSKS4G october   2009  – august 2023 TL331-Q1 , TL331B-Q1 , TL391B-Q1

PRODMIX  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings, TL331-Q1
    2. 6.2  Absolute Maximum Ratings, TL331B-Q1 and TL391B-Q1
    3. 6.3  ESD Ratings, All Devices
    4. 6.4  Recommended Operating Conditions, TL331-Q1
    5. 6.5  Recommended Operating Conditions, TL331B-Q1 and TL391B-Q1
    6. 6.6  Thermal Information
    7. 6.7  Electrical Characteristics, TL331B-Q1 and TL391B-Q1
    8. 6.8  Switching Characteristics, TL331B-Q1 and TL391B-Q1
    9. 6.9  Electrical Characteristics, TL331-Q1
    10. 6.10 Switching Characteristics, TL331-Q1
    11. 6.11 Typical Characteristics, TL331-Q1
    12. 6.12 Typical Characteristics, TL331B-Q1 and TL391B-Q1
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Voltage Comparison
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Voltage Range
        2. 8.2.2.2 TL331B-Q1 and TL391B-Q1 ESD Protection
        3. 8.2.2.3 Minimum Overdrive Voltage
        4. 8.2.2.4 Output and Drive Current
        5. 8.2.2.5 Response Time
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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Feature Description

The TL331-Q1 consists of a PNP Darlington pair input, allowing the device to operate with very high gain and fast response with minimal input bias current. The input Darlington pair creates a limit on the input common mode voltage capability, allowing TL331-Q1 to accurately function from ground to VCC – 1.5 V differential input.

The output consists of an open collector NPN (pull-down or low side) transistor. The output NPN will sink current when the negative input voltage is higher than the positive input voltage and the offset voltage. The VOL is resistive and will scale with the output current. Please see Figure 6-3 for VOL values with respect to the output current.