ZHCSGK4E September   2017  – November 2019 TLV7011 , TLV7012 , TLV7021 , TLV7022

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      X2SON 封装与 SC70 和美元硬币对比
      2.      传播延迟与过驱动
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions: TLV7012/22
  6. Specifications
    1. 6.1  Absolute Maximum Ratings (Single)
    2. 6.2  Absolute Maximum Ratings (Dual)
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions (Single)
    5. 6.5  Recommended Operating Conditions (Dual)
    6. 6.6  Thermal Information (Single)
    7. 6.7  Thermal Information (Dual)
    8. 6.8  Electrical Characteristics (Single)
    9. 6.9  Switching Characteristics (Single)
    10. 6.10 Electrical Characteristics (Dual)
    11. 6.11 Switching Characteristics (Dual)
    12. 6.12 Timing Diagrams
    13. 6.13 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
      2. 7.4.2 Internal Hysteresis
      3. 7.4.3 Output
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Inverting Comparator With Hysteresis for TLV701x
      2. 8.1.2 Noninverting Comparator With Hysteresis for TLV701x
    2. 8.2 Typical Applications
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 IR Receiver Analog Front End
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Square-Wave Oscillator
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 评估模块
    2. 11.2 相关链接
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Detailed Design Procedure

The IR receiver AFE design is highly streamlined and optimized. R1 converts the IR light energy induced current into voltage and applies to the inverting input of the comparator. Because a reverse biased IR LED is used as the IR receiver, a higher I/V transimpedance gain is required to boost the amplitude of reduced current. A 10M resistor is used as R1 to support a 1-V, 100-nA transimpedance gain. This is made possible with the picoamps Input bias current IB (5pA typical). The RC network of R2 and C1 establishes a reference voltage Vref which tracks the mean amplitude of the IR signal. The RC constant of R2 and C1 (about 4.7 ms) is chosen for Vref to track the received IR current fluctuation but not the actual data bit stream. The noninverting input is connected to Vref and the output over the R3 and R4 resistor network which provides additional hysteresis for improved guard against spurious toggles.

To reduce the current drain from the coin cell battery, data transmission must be short and infrequent.