7.3.3 Dropout Voltage

The TLV702-Q1 uses a PMOS pass transistor to achieve low dropout. When (V_IN – V_OUT) is less than the dropout voltage (V_DO), the PMOS pass device is in the linear (triode) region of operation. The input-to-output resistance is equal to the drain-source on-state resistance (R_DS(on)) of the PMOS pass element. V_DO scales approximately with output current because the PMOS device behaves as a resistor in dropout.

As with any linear regulator, PSRR and transient response are degraded as (V_IN – V_OUT) approaches dropout. This effect is shown in Figure 13.