7.3.1 Undervoltage Lockout (UVLO)

The TLV713 uses a UVLO circuit that disables the output until the input voltage is greater than the rising UVLO voltage. This circuit ensures that the device does not exhibit any unpredictable behavior when the supply voltage is lower than the operational range of the internal circuitry, V_IN(min). During UVLO disable, the output of the TLV713P version is connected to ground with a 120-Ω pulldown resistor. Fast rising and falling voltage changes near UVLO levels require at least a 1-ms delay before the rising and falling edges; see the UVLO Circuit Limitation section.