These devices are immune to quick voltage transient or excursion on VDD. Sensitivity to transients depends on both pulse duration (t_GI) found in Section 7.6 and transient overdrive. Overdrive is defined by how much VDD exceeds the specified threshold. Threshold overdrive is calculated as a percent of the threshold in question, as shown in Equation 1.

where

• V_IT– is the threshold voltage
• VDD is the input voltage crossing V_IT–

Figure 8-1 Overdrive Versus Pulse Duration

TLV803E, TLV809E, and TLV810E devices have built-in glitch immunity (t_GI) of 10 µs typical as shown in
Section 7.6. Figure 8-2 shows that VDD must fall below V_IT- for t_GI, otherwise the faling transistion is ignored. When VDD falls below V_IT- for t_GI, RESET transitions low to indicate a fault condition after the propagation delay high-to-low (t_PDHL). When VDD rises above V_IT+, RESET only deasserts to logic high indicating there is no more fault condition only if VDD remains above V_IT+ for longer than the reset delay (t_D).

Figure 8-2 Glitch Immunity when VDD Rises Above V_IT+ for Less than RESET Delay (TLV803EA29)