ZHCSQR8A March   2023  – December 2023 TMAG5170D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Magnetic Characteristics
    7. 5.7 Power up Timing
    8. 5.8 SPI Interface Timing
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Magnetic Flux Direction
      2. 6.3.2 Sensor Location
      3. 6.3.3 Magnetic Range Selection
      4. 6.3.4 Update Rate Settings
      5. 6.3.5 ALERT Function
        1. 6.3.5.1 Interrupt and Trigger Mode
        2. 6.3.5.2 Magnetic Switch Mode
      6. 6.3.6 Threshold Count
      7. 6.3.7 Diagnostics
        1. 6.3.7.1  Memory Cyclic Redundancy Check (CRC)
        2. 6.3.7.2  ALERT Integrity Check
        3. 6.3.7.3  VCC Check
        4. 6.3.7.4  Internal LDO Undervoltage Check
        5. 6.3.7.5  Digital Core Power-On Reset Check
        6. 6.3.7.6  SDO Output Check
        7. 6.3.7.7  Communication Cyclic Redundancy Check (CRC)
        8. 6.3.7.8  Oscillator Integrity Check
        9. 6.3.7.9  Magnetic Field Threshold Check
        10. 6.3.7.10 Temperature Alert Check
        11. 6.3.7.11 Analog Front-End (AFE) Check
        12. 6.3.7.12 Hall Resistance and Switch Matrix Check
        13. 6.3.7.13 Hall Offset Check
        14. 6.3.7.14 ADC Check
    4. 6.4 Device Functional Modes
      1. 6.4.1 Operating Modes
        1. 6.4.1.1 Active Mode
        2. 6.4.1.2 Standby Mode
        3. 6.4.1.3 Configuration Mode (DEFAULT)
        4. 6.4.1.4 Sleep Mode
        5. 6.4.1.5 Wake-Up and Sleep Mode
        6. 6.4.1.6 Deep-Sleep Mode
    5. 6.5 Programming
      1. 6.5.1 Data Definition
        1. 6.5.1.1 Magnetic Sensor Data
        2. 6.5.1.2 Temperature Sensor Data
        3. 6.5.1.3 Magnetic Sensor Offset Correction
        4. 6.5.1.4 Angle and Magnitude Data Definition
      2. 6.5.2 Serial Peripheral Interface (SPI)
        1. 6.5.2.1 SCK
        2. 6.5.2.2 CS
        3. 6.5.2.3 SDI
        4. 6.5.2.4 SDO
          1. 6.5.2.4.1 Regular 32-Bit SDO Read
          2. 6.5.2.4.2 Special 32-Bit SDO Read
        5. 6.5.2.5 SPI CRC
        6. 6.5.2.6 SPI Frame
          1. 6.5.2.6.1 32-Bit Read Frame
          2. 6.5.2.6.2 32-Bit Write Frame
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Selecting the Sensitivity Option
      2. 7.1.2 Temperature Compensation for Magnets
      3. 7.1.3 Sensor Conversion
        1. 7.1.3.1 Continuous Conversion
        2. 7.1.3.2 Trigger Conversion
        3. 7.1.3.3 Pseudo-Simultaneous Sampling
      4. 7.1.4 Error Calculation During Linear Measurement
      5. 7.1.5 Error Calculation During Angular Measurement
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Gain Adjustment for Angle Measurement
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Register Map
  10. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

6.3.7.11 Analog Front-End (AFE) Check

This diagnostic mechanism allows the controller to check the performance of the analog signal path. In this check, the device disconnects the Hall sensor from the signal path and uses an alternate resistance bridge to create a known, predetermined signal as an input to the signal path. This mechanism then checks if the measured digital value compared to a fixed value from the factory is within a pre-programmed, factory-determined value. This mechanism can detect issues with multiplexers, offset cancellation mechanism, the gain stages, the low-pass filter, and the ADC as well.

To run this check, the controller must enable the check and set the scheduling for the run. During this check, the AFE is not available for magnetic field conversion. The user can configure the ALERT pin to toggle if an error is detected. This error is also reported in the user register.

Run ModeEvery time a magnetic measurement is initiated and completed
Configuration Register(s)DIAG_EN to enable test. DIAG_SEL to schedule when the test is run
Fault Register Bit SENS_STAT
Impact if disabledIf disabled, any failures or drift with the analog front-end signal path may not be detected.
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