9.4.3 Action of the Constant-Power Engine

Figure 32 illustrates the operation of the constant-power engine during start-up. The circuit used to generate the waveforms of Figure 32 was programmed to a power limit of 21 W by means of the resistor connected between PROG and GND. At the moment current begins to flow through the internal FET, a voltage of 12 V appears across it (input voltage V_VCC = 12 V), and the constant-power engine therefore allows a current of 1.75 A (equal to 21 W divided by 12 V) to flow. This current increases in inverse ratio as the drain-to-source voltage diminishes, so as to maintain a constant dissipation of 21 W. The constant-power engine adjusts the current by altering the reference signal fed to the current limit amplifier. The lower part of Figure 32 shows the measured power dissipated in the internal FET, labeled FET PWR, remaining substantially constant during this period of operation, which ends when the current through the FET reaches the current limit I_LIM. This behavior can be considered a form of foldback limiting, but unlike the standard linear form of foldback limiting, it allows the power device to operate near its maximum capability, thus reducing the start-up time.

Figure 32. Computation of Power Stress During Startup