ZHCSOF7B september 2022 – june 2023 TPS25990
PRODUCTION DATA
STATUS_CML is a standard PMBus® command that returns the status flags related to communication, logic, and memory faults as shown in Table 9-69.
This command uses the PMBus® read byte protocol.
To clear the bits in this register, the underlying faults must be removed and the CLEAR_FAULTS command must be issued by the host controller.| Bit | Name | Value | Description | Default | Access |
|---|---|---|---|---|---|
7 | INV_CMD | Command status | Read | ||
1 | Invalid/unsupported command received | 0 | |||
0 | Valid/supported command received | ||||
6 | INV_DATA | Data status | |||
1 | Invalid/unsupported data received | 0 | |||
0 | Valid/supported data received | ||||
5 | INV_PEC | Packet Error Check status | |||
1 | PEC failed | 0 | |||
0 | PEC passed | ||||
4 | MEMORY_FLT | Memory fault status | |||
1 | Memory related fault - Configuration Memory Content Invalid (Empty or corrupted) OR STORE_USER_ALL or RESTORE_USER_ALL commands unsuccessful | 0 | |||
0 | No memory related fault | ||||
3:1 | Reserved | 000 | Reserved | 000 | |
0 | OTHER | Other communications failure | 0 | ||
The SMBA# signal may be asserted due to a CML fault if the CML_ERR is unmasked in the ALERT_MASK register. If there are multiple PMBus® devices on the same bus, TI recommends unmasking the CML_ERR only while communicating with the TPS25990 and masking it at all other times. This prevents TPS25990 from asserting the SMBA# due to CML faults generated by other devices on the bus.