ZHCSOF7B september 2022 – june 2023 TPS25990
PRODUCTION DATA
STORE_USER_ALL is a standard PMBus® command that writes the contents of the certain Configuration RAM registers to their respective non-volatile configuration memory (NVM) or EEPROM locations. The TPS25990 has two (2) one-time programmable banks in the NVM which are available to the users to store their custom configurations. This command will try to write to NVM Bank-1 first if it’s not programmed yet. If NVM Bank-1 is already programmed, it will attempt to write to NVM Bank-2 if it’s not programmed. If NVM Bank-2 is already programmed, it will attempt to write to Page-2 of an external EEPROM if available and configured.
This command uses the PMBus® send byte protocol. There is no data byte for this command. This command is write only.
This command should be preceded by the MFR_WRITE_PROTECT command to unlock the device first to prevent accidental/spurious writes.
The external EEPROM needs to be enabled by setting the EXT_EEPROM bit in the DEVICE_CONFIG register. In addition, it is done by configuring two (2) of the four (4) GPIOs as EECLK and EEDATA appropriately in the GPIO_CONFIG_12 and GPIO_CONFIG_34 registers. Make sure those two (2) selected GPIO pins are physically connected to the EEPROM clock and data pins respectively on the board.
The MEMORY_FLT bit in the STATUS_CML register gets set if the STORE_USER_ALL command is unsuccessful. TI recommends reading the STATUS_CML register after sending the STORE_USER_ALL command to verify whether it was successful or not.
The NVM inside the TPS25990x eFuse only has two (2) one-time programmable banks available for user programming. If an external EEPROM is not used, before sending the STORE_USER_ALL command the user should ensure that at least one bank of internal NVM is available for programming by reading the CONFIG_NVM_STAT bit in the STATUS_MFR_SPECIFIC_2 register.