ZHCS155C March 2011 – November 2023 TPS40170
PRODUCTION DATA
Figure 7-2 shows an input from 10 V to 60 V for an output of 5.0 V at 6 A, efficiency graph for this design. Figure 7-3 shows an input of 24 V for an output of 5.0 V at 6 A, loop response where VIN = 24 V and IOUT = 6 A, yielding 58-kHz bandwidth, 51° phase margin. Figure 7-4 shows the output ripple 20 mV/div, 2 µs/div, 20-MHz bandwidth.