The STATUS_IOUT command returns one data byte with contents as follows. None of these bits is affected by the state of SMBALERT_MASK. However, if the corresponding fault/warning disable bits in the FAULT_CTRL register is set, then the corresponding status bits will also be blocked in addition to blocking the response from that fault. All supported bits may be cleared either by CLEAR_FAULTS, turning on the output through the mechanism programmed into ON_OFF_CONFIG, or individually by writing 1b to the STATUS_IOUT register in their position, per the PMBus 1.3.1 Part II specification section 10.2.3.

OCF[7] and OCW[5] share a single NVM bit for changing the shared default NVM masking capability. Thus, overcurrent fault and warning SMBALERT masking default can be set and stored to NVM by the user; however, since they share a single NVM bit, the default ability or inability (masking) to set SMBALERT is always common/same after a restore from NVM or power-cycle. In contrast, dynamically setting the two smb_alert mask bits different/independently is allowed and is the only way the two mask settings can be different. Upon power-cycle/NVM-restore the two SMB_ALERT mask settings will revert to the same setting. The initial default is that both will trigger SMBALERT (as noted in the SMBALERT_MASK command default definition). The actual NVM bit is associated with OCW [5] – so, the value in this bit position’s SMBALERT_MASK bit is what is stored/restored to/from NVM.

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