SLVSH95 July 2024 TPS546C25
ADVANCE INFORMATION
The Supported PMBus Commands and Default Values Table lists the implemented registers and also the default for the bit behavior and register values.
| Command Code | Command Name | R/W | NVM | Default Value (Hex) | Default Behavior |
|---|---|---|---|---|---|
| 01h | OPERATION | R/W | NO | 04h | Defines the operation of the device. |
| 02h | ON_OFF_CONFIG | R/W | YES | 16h | Turn ON/OFF by CNTL pin, Use TOFF_DELAY |
| 03h | CLEAR_FAULTS | W | NO | N/A | Clear all faults. |
| 04h | PHASE | R | NO | N/A | STACK_POSITION set by pinstrap selection. |
| 09h | P2_PLUS_WRITE | W | NO | N/A | Page Plus Write function to send a command to a specific page and phase or all phases. |
| 0Ah | P2_PLUS_READ | R/W | NO | N/A | Page Plus Read function to read data in a specific page and phase or all phases. |
| 0Eh | PASSKEY | R/W | YES | 00h | Passkey to lock access to (DDh) EXT_WRITE_PROTECTION |
| 10h | WRITE_PROTECT | R/W | YES | 00h | All commands are writable. |
| 15h | STORE_USER_ALL | W | NO | N/A | Stores all current storable register settings into NVM. |
| 16h | RESTORE_USER_ALL | W | NO | N/A | Restores all storable register settings from NVM. |
| 19h | CAPABILITY | R | NO | D0h | The device has an SMB_ALERT# pin. |
| 1Bh | SMBALERT_MASK | R/W | YES | N/A | Sets ability to mask events that trigger SMB_ALERT#. |
| 20h | VOUT_MODE | R | NO | 97h | Indicates the device is relative format with an exponent value of -9 for an equivalent LSB of 1.953mV. |
| 21h | VOUT_COMMAND | R/W | NO | VBOOT | Set the output voltage through PMBus. |
| 22h | VOUT_TRIM | R/W | YES | 0000h | Apply a fixed offset voltage to the output voltage command value. |
| 24h | VOUT_MAX | R/W | YES | VSEL | Maximum output voltage, initially set by pinstrap and settable by PMBus. |
| 25h | VOUT_MARGIN_HIGH | R/W | YES | 0210h | Sets the margin high percentage when selected in OPERATION register. |
| 26h | VOUT_MARGIN_LOW | R/W | YES | 01F0h | Sets the margin low percentage when selected in OPERATION register. |
| 27h | VOUT_TRANSITION_RATE | R/W | YES | E850h | Sets the rate in mV/μs the output changes voltage. |
| 29h | VOUT_SCALE_LOOP | R/W | YES | E804h | Sets the feedback resistor ratio. |
| 2Ah | VOUT_SCALE_MONITOR | R/W | YES | E804h | Sets the feedback resistor ratio when external feedback divider is used for telemetry purposes. |
| 2Bh | VOUT_MIN | R/W | YES | 80h | Minimum output voltage, initially set by pinstrap and settable by PMBus. |
| 33h | FREQUENCY_SWITCH | R/W | YES | 3806h | Sets the switching frequency with default set to 800kHz. |
| 35h | VIN_ON | R/W | YES | 0002h | PVIN ON threshold, 2.5V |
| 36h | VIN_OFF | R/W | YES | 0002h | PVIN OFF threshold, 2.3V |
| 39h | IOUT_CAL_OFFSET | R/W | YES | F000h | Used to add or subtract a fixed offset from READ_IOUT with default of 0A. |
| 40h | VOUT_OV_FAULT_LIMIT | R/W | YES | 024Dh | VOUT Tracking OV Fault threshold = +12% |
| 41h | VOUT_OV_FAULT_RESPONSE | R/W | YES | RESPONSE | Fault Response to OV, Set by Pin Detect or override through PMBus |
| 42h | VOUT_OV_WARN_LIMIT | R/W | YES | 0233h | VOUT Tracking OV Warning threshold = +8% |
| 43h | VOUT_UV_WARN_LIMIT | R/W | YES | 01CDh | VOUT Tracking UV Warning threshold = −8% |
| 44h | VOUT_UV_FAULT_LIMIT | R/W | YES | 01B3h | VOUT Tracking UV Fault threshold = −24% |
| 45h | VOUT_UV_FAULT_RESPONSE | R/W | YES | RESPONSE | Fault Response to UV, Set by Pin Detect or override through PMBus |
| 46h | IOUT_OC_FAULT_LIMIT | R/W | YES | IOCL | Low-side valley current limiting threshold, Set by pinstrap or NVM if pinstrap override is cleared. |
| 48h | IOUT_OC_LV_FAULT_LIMIT | R | NO | 01B3h | Same contents as VOUT_UV_FAULT_LIMIT |
| 49h | IOUT_OC_LV_FAULT_RESPONSE | R | NO | RESPONSE | Same contents as VOUT_UV_FAULT_RESPONSE |
| 4Ah | IOUT_OC_WARN_LIMIT | R/W | YES | 0032h | Programmable Overcurrent warn limit, 50A |
| 4Fh | OT_FAULT_LIMIT | R/W | YES | 1022h | Programmable OT Fault threshold = 145 °C |
| 50h | OT_FAULT_RESPONSE | R/W | YES | RESPONSE | Fault Response to OT, Set by Pin Detect or override through PMBus |
| 51h | OT_WARN_LIMIT | R/W | YES | 1022h | Programmable OT Warning threshold = 125 °C |
| 55h | VIN_OV_FAULT_LIMIT | R/W | YES | 809h | PVIN OV Fault threshold = 18.5V |
| 60h | TON_DELAY | R/W | YES | F800h | 50μs delay when a start condition is received (as programmed by the ON_OFF_CONFIG register) until the output voltage starts to rise |
| 61h | TON_RISE | R/W | YES | F800h | 0.5ms from when the output starts to rise until the output voltage has entered the regulation band |
| 64h | TOFF_DELAY | R/W | YES | F800h | 0ms from when a stop condition is received (as programmed by the ON_OFF_CONFIG register) until the unit starts the soft-stop operation |
| 65h | TOFF_FALL | R/W | YES | F800h | 0.5ms from the end of the turn-off delay time until the internal reference DAC is commanded to 0mV |
| 78h | STATUS_BYTE | R | NO | 41h | Status is device is OFF, and OTH is 1b. |
| 79h | STATUS_WORD | R | NO | 2841h | VIN is off and PGOOD_Z is 1b. |
| 7Ah | STATUS_VOUT | R/W | YES | 0h | Current status |
| 7Bh | STATUS_IOUT | R/W | YES | 0h | Current status |
| 7Ch | STATUS_INPUT | R/W | YES | 0h | Current status |
| 7Dh | STATUS_TEMPERATURE | R/W | YES | 0h | Current status |
| 7Eh | STATUS_CML | R/W | NO | 0h | Current status |
| 7Fh | STATUS_OTHER | R/W | NO | 0h | Current status |
| 80h | STATUS_MFR_SPECIFIC | R/W | YES | 0h | Current status |
| 88h | READ_VIN | R | NO | N/A | Measured input voltage. |
| 8Bh | READ_VOUT | R | NO | N/A | Measured output voltage. |
| 8Ch | READ_IOUT | R | NO | N/A | Measured output current. |
| 8Dh | READ_TEMP_1 | R | NO | N/A | Measured Controller die temperature |
| 98h | PMBUS_REVISION | R | NO | 55h | PMBus 1.5 |
| 99h | MFR_ID | R | NO | 4954h | ASCII for "TI" |
| 9Ah | MFR_MODEL | R | NO | 00h | Device model |
| 9Bh | MFR_REVISION | R/W | YES | 00h | Device revision |
| ADh | IC_DEVICE_ID | R | NO | IC part number | |
| AEh | IC_DEVICE_REV | R | NO | 00h | IC revision |
| D1h | SYS_CFG_USER1 | R/W | YES | 0000h | |
| D3h | PMBUS_ADDR | R/W | YES | N/A | Set by pinstrap, can be written through PMBus. |
| D4h | COMP | R/W | YES | N/A | Set by pinstrap, can be written through PMBus. |
| D5h | VBOOT_OFFSET_1 | R/W | YES | N/A | Set by pinstrap, can be written through PMBus. When external divider is selected, VBOOT is the reference voltage at the FB pin. |
| D6h | STACK_CONFIG | R/W | YES | N/A | Set by pinstrap, can be written through PMBus. |
| D8h | PIN_DETECT_OVERRIDE | R/W | YES | 0C7Dh | Pinstrap is used by default. |
| D9h | NVM_CHECKSUM | R | NO | TBD | NVM Checksum excluding Passkey |
| DAh | READ_TELEMETRY | R | NO | N/A | Read VOUT, IOUT, and TEMP with a block read. |
| DBh | STATUS_ALL | R | NO | N/A | Read all STATUS with a block read. |
| DDh | EXT_WRITE_PROTECTION | RW | YES | 0000h | No registers are prohibited from being written. |
| DEh | IMON_CAL | R/W | YES | 07h | No gain trim for IOUT_READ |
| FCh | FUSION_ID0 | R | NO | 02C0h | Device Identification used by FUSION |
| FDh | FUSION_ID1 | R | NO | 4B434F4Ch | Device Identification used by FUSION |