When register CONF_EXPEN is set to 0, the MSB 8 bits of 12-bit binary input to PWM generator is directly copied from 8-bit register CONF_PWMOUTx, and the LSB 4 bits is directly copied from 4-bit register CONF_PWMLOWOUTx. The PWM output duty cycle can be calculated with Equation 3. Because the 4 LSB bits inputs are used to control the dithering, setting CONF_PWMLOWOUTx to Fh disables the dithering if it is not needed. The PWM output duty cycle is linearly controlled by the register CONF_PWMOUTx and CONFPWMLOWOUTx, which provides the linearly brightness control to each channel output.

Equation 3.

where

• CONF_PWWOUTx is decimal number from 0 to 255.
• CONF_PWMLOWOUTx is decimal number from 0 to 15.
• x is from 0 to 11 for different output channel.

If using the dithering feature to realize the 12-bit dimming resolution, set the PWM frequency higher than 2 kHz through setting register CONF_PWMFREQ to avoid visible brightness flicker when the value of CONF_PWMLOWOUTx is less than Fh. Higher PWM frequency can also prevent the visible LED flash in video display due to the low beat frequency between digital camera shutter frequency and PWM frequency for LED dimming.

Because the 12-bit PWM duty cycles require 2 bytes of write operation to update the completed data, the output PWM duty cycle is not changed in between of the two bytes data transmission. TPS929121-Q1 only updates PWM duty cycle of any output when its high 8-bit CONF_PWMOUTx is written. When very fast brightness change is needed, for example, fade-in and fade-out effects, simultaneous PWM duty cycle change of all channels is required. Setting CONF_SHAREPWM to 1 enables all channels using the PWM dutycycle setting of channel 0 to save communication latency.