ZHCSHL5C February   2018  – September 2019 TS3USBCA4

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (3 V ≤ VCC ≤ 3.6 V)
    6. 6.6  Electrical Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    7. 6.7  Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    8. 6.8  Timing Requirements (3 V ≤ VCC ≤ 3.6 V)
    9. 6.9  Timing Requirements (2.4 V ≤ VCC ≤ 5.5 V)
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Audio Path
      2. 8.3.2 High-Speed Paths
      3. 8.3.3 3-level Input
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 TS3USBCA4 Registers
        1. 8.6.1.1 Revision_ID Register (Offset = 9h) [reset = 0h]
          1. Table 8. Revision_ID Register Field Descriptions
        2. 8.6.1.2 General_1 Register (Offset = Ah) [reset = 0h]
          1. Table 9. General_1 Register Field Descriptions
        3. 8.6.1.3 General_2 Register (Offset = Bh) [reset = 0h]
          1. Table 10. General_2 Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

UQFN Package for TS3USBCA420
16-Pin (RSV)
Top View
UQFN Package for TS3USBCA410
16-Pin (RSV)
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME TS3USBCA420 TS3USBCA410
VCC 1 1 P Power supply. External decoupling capacitors are required close to this pin.
MIC_GND1/Ln1 2 2 I/O, CMOS Analog audio MIC/AGND signal connection to audio codec. This pin can also function as a general purpose I/O.
MIC_GND2/Ln2 3 3 I/O, CMOS Analog audio MIC/AGND signal connection to audio codec. This pin can also function as a general purpose I/O.
OEn 4 4 2 Level I Output Enable:
L: Normal Operation
H: Standby Mode, I2C registers reset (Default)
This pin has an internal weak pull-up.
SEL1/SCL 5 5 2 Level I
(Failsafe)		 In Pin Configuration Mode (I2C_EN = L), this pin functions as SEL1 which is used along with SEL0 pin to select switch configurations (Refer to Table 2). This pin has an internal weak pull-down.
In I2C Mode (I2C_EN = M or H), this pin functions as SCL pin for I2C clock. When used for I2C clock, pull it up to VI2C with a resistor between 0.62 kΩ and 2.2 kΩ.
SEL0/SDA 6 6 2 Level I/O
(Failsafe)		 In Pin Configuration Mode (I2C_EN = L), this pin functions as SEL0 which is used along with SEL1 pin to select switch configurations (Refer to Table 2). This pin has an internal weak pull-down.
In I2C Mode (I2C_EN = M or H), this pin functions as SDA pin for I2C data. When used for I2C data, pull it up to VI2C with a resistor between 0.62 kΩ and 2.2 kΩ.
LnBp 7 7 I/O, CMOS This pin can be used in single-ended format or as a positive polarity differential pair partner to pin LnBn. It can be used for connection to any generic I/O signals such as for DisplayPort AUX, PCI Express clock, I2C, UART, and debug interfaces.
LnBn 8 8 I/O, CMOS This pin can be used in single-ended format or as a negative polarity differential pair partner to pin LnBp. It can be used for connection to any generic I/O signals such as for DisplayPort AUX, PCI Express clock, I2C, UART, and debug interfaces.
GND 9 9 G Primary ground connection for the TS3USBCA4. Must be connected to system ground.
SBU2 10 10 I/O, CMOS
(Failsafe)		 This pin should be DC coupled to the SBU2 pin of the Type-C receptacle. This pin has an internal nominally 1.6-MΩ pull-down resistor.
SBU1 11 11 I/O, CMOS
(Failsafe)		 This pin should be DC coupled to the SBU1 pin of the Type-C receptacle. This pin has an internal nominally 1.6-MΩ pull-down resistor.
I2C_EN 12 12 3 Level I This pin enables I2C Mode and sets I2C mode addresses (Refer to Table 5) depending on the pin level defined in Table 1.
L: Pin Configuration Mode
M: I2C Mode enabled with I2C address ADDR0
H: I2C Mode enabled with I2C address ADDR1
This pin has an internal weak pull-down.
LnCn 13 I/O, CMOS This pin can be used in single-ended format or as a negative polarity differential pair partner to pin LnCp. It can be used for connection to any generic I/O signals such as for DisplayPort AUX, PCI Express clock, I2C, UART, and debug interfaces.
LnCp 14 I/O, CMOS This pin can be used in single-ended format or as a positive polarity differential pair partner to pin LnCn. It can be used for connection to any generic I/O signals such as for DisplayPort AUX, PCI Express clock, I2C, UART, and debug interfaces.
NC 13 Not connected.
FLIP 14 I/O, CMOS This pin flips the switches based on type-C plug orientation in pin configuration mode (I2C_EN=L).
L: Normal orientation.
H: Flipped orientation.
This pin has an internal weak pull-down.
LnAn 15 15 I/O, CMOS This pin can be used in single-ended format or as a negative polarity differential pair partner to pin LnAp. This pin is preferred for connection to DisplayPort AUX. It can also be used for connection to any generic I/O signals such as for PCI Express clock, I2C, UART, and debug interfaces.
LnAp 16 16 I/O, CMOS This pin can be used in single-ended format or as a positive polarity differential pair partner to pin LnAn. This pin is preferred for connection to DisplayPort AUX. It can also be used for connection to any generic I/O signals such as for PCI Express clock, I2C, UART, and debug interfaces.
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