The input pin of UCC27532-Q1 device is based on a standard CMOS-compatible input-threshold logic that is dependent on the VDD supply voltage. The input threshold is approximately 55% of VDD for rise and 45% of VDD for fall. With 18-V VDD, the typical high threshold is 9.4 V and the typical low threshold is 7.3 V. The 2.1-V hysteresis offers excellent noise immunity compared to traditional TTL logic implementations where the hysteresis is typically less than 0.5 V. For proper operation using CMOS input, the input signal level must be at a voltage equal to VDD. Using an input signal slightly larger than the threshold but less than VDD for the CMOS input can result in slower propagation delay from input to output (for example). This device also features tight control of the input-pin threshold voltage levels which eases system design considerations and ensures stable operation across temperature. The very low input capacitance, typically 20 pF, on these pins reduces loading and increases switching speed.

The device features an important safety function where the output is held in the low state whenever the input pin is in a floating condition. This function is achieved using GND pulldown resistors on the noninverting input pin (IN pin), as shown in the .

The input stage of the driver is best driven by a signal with a short rise or fall time. Caution must be exercised whenever the driver is used with slowly varying input signals, especially in situations where the device is located in a separate daughter board or PCB layout has long input-connection traces:

• High dI/dt current from the driver output coupled with board layout parasitics can cause ground bounce. Because the device features just one GND pin which can be referenced to the power ground, this can interfere with the differential voltage between input pins and GND and can trigger an unintended change of output state. Because of the fast 17-ns propagation delay, this can ultimately result in high-frequency oscillations, which increases power dissipation and poses a risk of damage
• 2.1-V input threshold hysteresis boosts noise immunity compared to most other industry standard drivers.

If limiting the rise or fall times to the power device to reduce EMI is necessary, then an external resistance is highly recommended between the output of the driver and the power device instead of adding delays on the input signal. This external resistor has the additional benefit of reducing part of the gate-charge-related power dissipation in the gate-driver device package and transferring the dissipation into the external resistor itself.