ZHCSC00C December   2013  – September 2024 UCC27532-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. 说明(续)
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD Undervoltage Lockout
      2. 7.3.2 Input Stage
      3. 7.3.3 Enable Function
      4. 7.3.4 Output Stage
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Driving IGBT Without Negative Bias
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input-to-Output Configuration
          2. 8.2.1.2.2 Input Threshold Type
          3. 8.2.1.2.3 VDD Bias Supply Voltage
          4. 8.2.1.2.4 Peak Source and Sink Currents
          5. 8.2.1.2.5 Enable and Disable Function
          6. 8.2.1.2.6 Propagation Delay
          7. 8.2.1.2.7 Power Dissipation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Driving IGBT With 13-V Negative Turnoff Bias
      3. 8.2.3 Using UCC27532-Q1 Drivers in an Inverter
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  12. 11Device and Documentation Support
    1. 11.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 静电放电警告
    7. 11.7 术语表
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

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Overview

High-current gate driver devices are required in switching power applications for a variety of reasons. To enable fast switching of power devices and reduce associated switching power losses, a powerful gate driver can be used between the PWM output of controllers or signal isolation devices and the gates of the power semiconductor devices. Further, gate drivers are indispensable when having the PWM controller directly drive the gates of the switching devices is not feasible. This situation is often encountered because the PWM signal from a digital controller or signal isolation device is often a 3.3-V or 5-V logic signal which is not capable of effectively turning on a power switch. A level shifting circuitry is required to boost the logic-level signal to the gate-drive voltage in order to fully turn on the power device and minimize conduction losses. Traditional buffer drive circuits based on NPN and PNP bipolar (or P-channel and N-channel MOSFET) transistors in totem-pole arrangement, being emitter-follower configurations, prove inadequate for this function because these circuits lack level-shifting capability and low-drive voltage protection. Gate drivers effectively combine both the level-shifting, buffer drive, and UVLO functions. Gate drivers have other uses such as minimizing the effect of switching noise by locating the high-current driver physically close to the power switch, driving gate-drive transformers, controlling floating power device gates, and reducing power dissipation and thermal stress in controllers by moving gate charge power losses into itself.

The UCC27532-Q1 device is very flexible in this role with a strong current-drive capability and wide supply-voltage range up to 35 V. These features allow the driver to be used in 12-V Si MOSFET applications, 20-V and –5-V (relative to source) SiC FET applications, 15-V and –15-V (relative to emitter) IGBT applications, and many others. As a single-channel driver, the UCC27532-Q1 device can be used as a low-side or high-side driver. To use the device as a low-side driver, the switch ground is typically the system ground so it can be connected directly to the gate driver. To use as a high-side driver with a floating return node, however, signal isolation is required from the controller as well as an isolated bias to the UCC27532-Q1 device. Alternatively, in a high-side drive configuration the UCC27532-Q1 device can be tied directly to the controller signal and biased with a non-isolated supply. However, in this configuration the outputs of the UCC27532-Q1 device must drive a pulse transformer which then drives the power-switch to work properly with the floating source and emitter of the power switch. Further, having the ability to control turnon and turnoff speeds independently with both the OUTH and OUTL pins ensures optimum efficiency while maintaining system reliability. These requirements coupled with the need for low propagation delays and availability in compact, low-inductance packages with good thermal capability makes gate driver devices such as the UCC27532-Q1 device extremely important components in switching power combining benefits of high-performance, low cost, component count and board-space reduction, and simplified system design.

Table 7-1 UCC27532-Q1 Features and Benefits
FEATUREBENEFIT
High source and sink current capability, 2.5 A and 5 A (asymmetrical).High current capability offers flexibility in employing UCC27532-Q1 device device to drive a variety of power switching devices at varying speeds.
Low 17 ns (typ) propagation delay.Extremely low pulse transmission distortion.
Wide VDD operating range of 10 V to
32 V.
Flexibility in system design.
Can be used in split-rail systems such as driving IGBTs with both positive and negative (relative to Emitter) supplies.
Optimal for many SiC FETs.
VDD UVLO protection.Outputs are held Low in UVLO condition, which ensures predictable, glitch-free operation at power up and power down.
High UVLO of 8.9 V typical ensures that power switch is not on in high-impedance state which could result in high power dissipation or even failures.
Outputs held low when input pin (IN) in floating condition.Safety feature, especially useful in passing abnormal condition tests during safety certification
Split output structure (OUTH, OUTL).Allows independent optimization of turnon and turnoff speeds using series gate resistors.
Strong sink current (5 A) and low pulldown impedance (0.65 Ω).High immunity to high dV/dt Miller turnon events.
CMOS compatible input threshold logic with wide 2.1-V hysteresis.Excellent noise immunity.
Input capable of withstanding –6.5 V.Enhanced signal reliability in noisy environments that experience ground bounce on the gate driver.