VDD is the power input connection for this device. In normal operation, power VDD through a current limiting resistor. The absolute maximum supply voltage is 20 V, including any transients that may be present. If this voltage is exceeded, device damage is likely. This is in contrast to the predecessor bipolar devices, which could survive up to 30 V on the input bias pin. Also, because no internal clamp is included in the device, the VDD pin must be protected from external sources which could exceed the 20 V level. If containing the start-up and bootstrap supply voltage from the auxiliary winding N_A below 20 V under all line and load conditions can not be achieved, use a zener protection diode from VDD to GND. Depending on the impedance and arrangement of the bootstrap supply, this may require adding a resistor, R_VDD, in series with the auxiliary winding to limit the current into the zener as shown in Figure 8-1. Insure that over all tolerances and temperatures, the minimum zener voltage is higher than the highest UVLO upper turnon threshold. To ensure against noise related problems, filter VDD with a ceramic bypass capacitor to GND. The VDD pin must be decoupled as close to the GND pin as possible.

Figure 8-1 VDD Protection

Although quiescent VDD current is only 2.3 mA, the total supply current is higher, depending on the OUT current. Total VDD current is the sum of quiescent VDD current and the average OUT current. Knowing the operating frequency and the MOSFET gate charge (Q_g), average OUT current can be calculated from Equation 1.

Equation 1.