ZHCSQ75C June 2022 – March 2023 UCC28C50-Q1 , UCC28C51-Q1 , UCC28C52-Q1 , UCC28C53-Q1 , UCC28C54-Q1 , UCC28C55-Q1 , UCC28C56H-Q1 , UCC28C56L-Q1 , UCC28C57H-Q1 , UCC28C57L-Q1 , UCC28C58-Q1 , UCC28C59-Q1
PRODUCTION DATA
In general, try to keep all high current loop areas as small as possible. Keep all traces with high current and high frequency away from other traces in the design. If necessary, high frequency/high current traces should be perpendicular to signal traces, not parallel to them. Shielding signal traces with ground planes can help reduce noise pick up. Always consider appropriate clearances between the high-voltage connections and any low voltage nets.
In order to increase the reliability and robustness of the design TI recommends the following PCB layout guidelines.