ZHCSMR1C october 2019 – september 2021 UCC5870-Q1
PRODUCTION DATA
Once all of the BIST complete, and communication is established from the primary to the secondary side, the device transitions to the Configuration 1 state. This is indicated when the nFLT* outputs are pulled high. In this state, the address for the device is programmable by the MCU. See the Device Addressing section for details on how to program the SPI address for the device. The driver output (OUTL) is pulled low in this state. Once the address is programmed, the CONFIG_IN command (see Table 7-3) must be sent to transition to the Configuration 2 state. Note that in Daisy Chain configurations, the CFG_IN must be sent to the devices one-by-one because the SDO output is not enabled until a valid addressed command is sent. This can be done by sending a full frame of 6 CFG_IN commands six times or, alternatively, send a CFG_IN to the first device as a single command followed by CFG_IN, NOP as the second frame, followed by CFG_IN, NOP, NOP as the third frame, and so on to enable the SDO output on all devices and send them to Configuration 2. This process only needs to be done once per power cycle unless an invalid address (non-0x0) is sent.