SBAA543 July 2022 AFE7900 , AFE7920 , AFE7950
It is possible that when the SoEMB is close to LEMC edge, some of lane0/1/2/3_f_counter_any_lane_ready read a very small value close to 0, and some lanes read values close to maximum value of fcounter (63 when E=1). The buffer index is essentially a circular indexing as the buffer has to absorb both advancements and delays in time. Such a case is shown in Figure 5-1(1).
Initially, the lane0/1/2/3_f_counter_any_lane_ready registers read from the range of (62,63,0,1,2). Specifically, lane0_f_counter_any_lane_ready reads 62 and lane3_f_counter_any_lane_ready reads 2. In such cases, it is recommended to shift the LEMC counter by writing to link0_init_f_counter, so that all fcounter values are close by values.
On rising edge of LEMC, the counter starts from value of link0_init_f_counter. In other words, the LEMC counter is shifted by link0_init_f_counter.
In Figure 5-1, we see that link0_init_f_counter is set to 7. With this, lane0_f_counter_any_lane_ready reads ((62+7)%64) = 5 and lane3_f_counter_any_lane_ready reads 2+7 = 9. RBD is set as 13 which has a margin of 4 from the last arriving lane. Note that the RBD value is also with reference to the shifted LEMC counter.
This can be done in Latte by setting the following parameter:
sysParams.jesdRxInitLmfcCounter = 7Parts of figures were based on JEDEC JESD204C standard, Figure 5 and Figure 50. Copyright JEDEC. Modifications have not been approved by and do not reflect the views of JEDEC.