SBAA565 November   2022 ADC081C021 , ADC081C027 , ADC101C021 , ADC101C027 , ADC121C021 , ADC121C021-Q1 , ADC121C027 , ADC128D818 , ADS1000 , ADS1000-Q1 , ADS1013 , ADS1014 , ADS1015 , ADS1015-Q1 , ADS1100 , ADS1110 , ADS1112 , ADS1113 , ADS1114 , ADS1115 , ADS1115-Q1 , ADS7823 , ADS7827 , ADS7828 , ADS7828-Q1 , ADS7830 , ADS7924 , AFE539A4 , DAC081C081 , DAC081C085 , DAC101C081 , DAC101C081Q , DAC101C085 , DAC121C081 , DAC121C085 , DAC43204 , DAC43401 , DAC43401-Q1 , DAC43608 , DAC43701 , DAC43701-Q1 , DAC53002 , DAC53004 , DAC53202 , DAC53204 , DAC53204W , DAC53401 , DAC53401-Q1 , DAC53608 , DAC53701 , DAC53701-Q1 , DAC5571 , DAC5573 , DAC5574 , DAC5578 , DAC60501 , DAC60502 , DAC63002 , DAC63004 , DAC63202 , DAC63204 , DAC6571 , DAC6573 , DAC6574 , DAC6578 , DAC70501 , DAC70502 , DAC7571 , DAC7573 , DAC7574 , DAC7578 , DAC7678 , DAC80501 , DAC80502 , DAC8571 , DAC8574

 

  1.   Abstract
  2.   Trademarks
  3. 1I2C Overview
    1. 1.1 History
    2. 1.2 I2C Speed Modes
  4. 2I2C Physical Layer
    1. 2.1 Two-Wire Communication
    2. 2.2 Open-Drain Connection
    3. 2.3 Non-Destructive Bus Contention
  5. 3I2C Protocol
    1. 3.1 I2C START and STOP
    2. 3.2 Logical Ones and Zeros
    3. 3.3 I2C Communication Frames
  6. 4I2C Examples
    1. 4.1 DAC80501 Example
      1. 4.1.1 DAC80501 DAC Data Register
      2. 4.1.2 DAC80501 I2C Example Write
    2. 4.2 ADS1115 Example
      1. 4.2.1 ADS1115 Configuration Register
      2. 4.2.2 ADS1115 I2C Example Read
      3. 4.2.3 ADS1115 Conversion Result
  7. 5Reserved Addresses
    1. 5.1 General Call
    2. 5.2 START Byte
    3. 5.3 C-Bus Address, Different Bus Format, Future Purposes
    4. 5.4 HS-Mode Controller Code
    5. 5.5 Device ID
    6. 5.6 10-Bit Target Addressing
      1. 5.6.1 10-Bit Target Addressing Write
      2. 5.6.2 10-Bit Target Addressing Read
  8. 6Advanced Topics
    1. 6.1 Clock Synchronization and Arbitration
    2. 6.2 Clock Stretching
    3. 6.3 Electrical Specifications
    4. 6.4 Voltage Level Translation
      1. 6.4.1 Example 1
      2. 6.4.2 Example 2
      3. 6.4.3 Example 3
      4. 6.4.4 Example 4
    5. 6.5 Pullup Resistor Sizing
      1. 6.5.1 Minimum Pullup Resistance Sizing
      2. 6.5.2 Maximum Pullup Resistance Sizing
  9. 7Protocols Similar to I2C
  10. 8Summary

Open-Drain Connection

The open-drain connections are used on both SDA and SCL lines and connect to an NMOS transistor. This open-drain connection controls the I2C communication line and pulls the line low or releases the line high. The open-drain refers to the NMOS bus connection when the NMOS is turned OFF. Figure 2-2 shows the open-drain connection as the NMOS is turned on.

Figure 2-2 Open-Drain Connection Pulls Line Low When NMOS is Turned On

To set the voltage level of the SDA or SCL line, the NMOS is set on or off. When the NMOS is on, the device pulls current through the resistor to ground. This pulls the open-drain line low. Typically, the transition from high to low for I2C is a fast transition as the NMOS pulls down on SDA or SCL. The speed of the transition is determined by the NMOS drive strength and any bus capacitance on SDA or SCL.

When the NMOS turns off, the device stops pulling current, and the pullup resistor pulls the SDA or SCL line to VDD. Figure 2-3 shows an open-drain line as the NMOS is turned off. The pullup resistor pulls the line high. The transition of the open-drain line is slower because line is pulled up against the bus capacitance, and is not actively driven.

Figure 2-3 Pullup Resistor Pulls Line High When NMOS is Turned Off

Through control of this open-drain connection, both SDA and SCL can be set high and low, enabling the I2C communication.

Because of capacitance on the I2C communication line, the SDA and SCL lines discharge with an exponential settling RC time constant depending on the size of the pullup resistor and capacitance on the I2C bus. Higher capacitance limits the speed of I2C communication, the number of devices, and the physical distance between devices on the bus. A smaller pullup resistor has a faster rise time, but requires more power for communication. A larger pullup resistor has a slower rise time leading to slower communication, but requires less power.