米6体育平台手机版

SLAS590P March 2009 – September 2020

PRODUCTION DATA

8.36 12-Bit ADC, Timing Parameters

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	V_CC	MIN	TYP	MAX	UNIT
f_ADC12CLK	ADC conversion clock	For specified performance of ADC12 linearity parameters using an external reference voltage or AVCC as reference⁽¹⁾	2.2 V, 3 V	0.45	4.8	5.0	MHz
		For specified performance of ADC12 linearity parameters using the internal reference⁽²⁾		0.45	2.4	4.0
		For specified performance of ADC12 linearity parameters using the internal reference⁽³⁾		0.45	2.4	2.7
f_ADC12OSC	Internal ADC12 oscillator⁽⁴⁾	ADC12DIV = 0, f_ADC12CLK = f_ADC12OSC	2.2 V, 3 V	4.2	4.8	5.4	MHz
t_CONVERT	Conversion time	REFON = 0, internal oscillator, ADC12OSC used for ADC conversion clock	2.2 V, 3 V	2.4		3.1	µs
t_CONVERT	Conversion time	External f_ADC12CLK from ACLK, MCLK, or SMCLK, ADC12SSEL ≠ 0			13 × 1 / f_ADC12CLK		µs
t_Sample	Sampling time	R_S = 400 Ω, R_I = 1000 Ω, C_I = 20 pF, t = (R_S + R_I) × C_I ⁽⁵⁾	2.2 V, 3 V	1000			ns

(1) REFOUT = 0, external reference voltage: SREF2 = 0, SREF1 = 1, SREF0 = 0. AVCC as reference voltage: SREF2 = 0, SREF1 = 0, SREF0 = 0. The specified performance of the ADC12 linearity is ensured when using the ADC12OSC. For other clock sources, the specified performance of the ADC12 linearity is ensured with f_ADC12CLK maximum of 5.0 MHz.

(2) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 1

(3) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 0. The specified performance of the ADC12 linearity is ensured when using the ADC12OSC divided by 2.

(4) The ADC12OSC is sourced directly from MODOSC inside the UCS.

(5) Approximately 10 Tau (t) are needed to get an error of less than ±0.5 LSB:
t_Sample = ln(2ⁿ⁺¹) x (R_S + R_I) × C_I + 800 ns, where n = ADC resolution = 12, R_S = external source resistance