TI recommends connecting a combination of a 1-µF plus a 100-nF low-ESR ceramic decoupling capacitor to each AVCC and DVCC pin (see Figure 10-1). Higher-value capacitors may be used but can affect supply rail ramp-up time. Decoupling capacitors must be placed as close as possible to the pins that they decouple (within a few millimeters). Additionally, TI recommends separated grounds with a single-point connection for better noise isolation from digital to analog circuits on the board and to achieve high analog accuracy.

Figure 10-1 Power Supply Decoupling

For PVCC and PVSS, TI recommends connecting a combination of a 1-µF plus a 22-µF low-ESR ceramic decoupling capacitor between the PVCC and PVSS pins and a serial 22-Ω resistor to filter low-frequency noise on the supply line (see Figure 10-2).

Figure 10-2 Power Supply Decoupling for PVCC and PVSS